Millimeter Wave Beam Alignment: Large Deviations Analysis and Design Insights

In millimeter wave cellular communication, fast and reliable beam alignment via beam training is crucial to harvest sufficient beamforming gain for the subsequent data transmission. In this paper, we establish fundamental limits in beam-alignment performance under both the exhaustive search and the hierarchical search that adopts multi-resolution beamforming codebooks, accounting for time-domain training overhead. Specifically, we derive lower and upper bounds on the probability of misalignment for an arbitrary level in the hierarchical search, based on a single-path channel model. Using the method of large deviations, we characterize the decay rate functions of both bounds and show that the bounds coincide as the training sequence length goes large. We go on to characterize the asymptotic misalignment probability of both the hierarchical and exhaustive search, and show that the latter asymptotically outperforms the former, subject to the same training overhead and codebook resolution. We show via numerical results that this relative performance behavior holds in the non-asymptotic regime. Moreover, the exhaustive search is shown to achieve significantly higher worst-case spectrum efficiency than the hierarchical search, when the pre-beamforming signal-to-noise ratio (SNR) is relatively low. This study hence implies that the exhaustive search is more effective for users situated further from base stations, as they tend to have low SNR.Comment: Author final manuscript, to appear in IEEE Journal on Selected Areas in Communications (JSAC), Special Issue on Millimeter Wave Communications for Future Mobile Networks, 2017 (corresponding author: Min Li

Timing models for high-level synthesis

In this paper, we describe a timing model for clock estimation during high-level synthesis. In order to obtain realistic timing estimates, the proposed model considers all delay elements, including datapath, control and wire delays, and several technology factors, such as layout architecture, technology mapping, buffers insertion and loading effects. The experimental results show that this model can provide much better estimates than previous models. This model is well suited for automatic and interactive synthesis as well as feedback-driven synthesis where performance matrices must be rapidly and incrementally calculated

Cramér-Rao sensitivity limits for astronomical instruments: implications for interferometer design

Multiple-telescope interferometry for high-angular-resolution astronomical imaging in the optical–IR–far-IR bands is currently a topic of great scientific interest. The fundamentals that govern the sensitivity of direct-detection instruments and interferometers are reviewed, and the rigorous sensitivity limits imposed by the Cramér–Rao theorem are discussed. Numerical calculations of the Cramér–Rao limit are carried out for a simple example, and the results are used to support the argument that interferometers that have more compact instantaneous beam patterns are more sensitive, since they extract more spatial information from each detected photon. This argument favors arrays with a larger number of telescopes, and it favors all-on-one beam-combining methods as compared with pairwise combination

Design of multimedia processor based on metric computation

Media-processing applications, such as signal processing, 2D and 3D graphics rendering, and image compression, are the dominant workloads in many embedded systems today. The real-time constraints of those media applications have taxing demands on today's processor performances with low cost, low power and reduced design delay. To satisfy those challenges, a fast and efficient strategy consists in upgrading a low cost general purpose processor core. This approach is based on the personalization of a general RISC processor core according the target multimedia application requirements. Thus, if the extra cost is justified, the general purpose processor GPP core can be enforced with instruction level coprocessors, coarse grain dedicated hardware, ad hoc memories or new GPP cores. In this way the final design solution is tailored to the application requirements. The proposed approach is based on three main steps: the first one is the analysis of the targeted application using efficient metrics. The second step is the selection of the appropriate architecture template according to the first step results and recommendations. The third step is the architecture generation. This approach is experimented using various image and video algorithms showing its feasibility

Measurements, Models, Systems and Design

531 s.