282 research outputs found

    An Efficiency-Focused Design of Direct-DC Loads in Buildings

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    Despite the recent interest in direct current (DC) power distribution in buildings, the market for DC-ready loads remains small. The existing DC loads in various products or research test beds are not always designed to efficiently leverage the benefits of DC. This work addresses a pressing need for a study into the development of efficient DC loads. In particular, it focuses on documenting and demonstrating how to best leverage a DC input to eliminate or improve conversion stages in a load’s power converter. This work identifies how typical building loads can benefit from DC input, including bath fans, refrigerators, task lights, and zone lighting. It then details the development of several prototypes that demonstrate efficiency savings with DC. The most efficient direct-DC loads are explicitly designed for DC from the ground up, rather than from an AC modification

    High Current Density Low Voltage Isolated Dc-dc Converterswith Fast Transient Response

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    With the rapid development of microprocessor and semiconductor technology, industry continues to update the requirements for power supplies. For telecommunication and computing system applications, power supplies require increasing current level while the supply voltage keeps decreasing. For example, the Intel\u27s CPU core voltage decreased from 2 volt in 1999 to 1 volt in 2005 while the supply current increased from 20A in 1999 to up to 100A in 2005. As a result, low-voltage high-current high efficiency dc-dc converters with high power-density are demanded for state-of-the-art applications and also the future applications. Half-bridge dc-dc converter with current-doubler rectification is regarded as a good topology that is suitable for high-current low-voltage applications. There are three control schemes for half-bridge dc-dc converters and in order to provide a valid unified analog model for optimal compensator design, the analog state-space modeling and small signal modeling are studied in the dissertation and unified state-space and analog small signal model are derived. In addition, the digital control gains a lot of attentions due to its flexibility and re-programmability. In this dissertation, a unified digital small signal model for half-bridge dc-dc converter with current doubler rectifier is also developed and the digital compensator based on the derived model is implemented and verified by the experiments with the TI DSP chip. In addition, although current doubler rectifier is widely used in industry, the key issue is the current sharing between two inductors. The current imbalance is well studied and solved in non-isolated multi-phase buck converters, yet few discusse this issue in the current doubler rectification topology within academia and industry. This dissertation analyze the current sharing issue in comparison with multi-phase buck and one modified current doubler rectifier topology is proposed to achieve passive current sharing. The performance is evaluated with half bridge dc-dc converter; good current sharing is achieved without additional circuitry. Due to increasing demands for high-efficiency high-power-density low-voltage high current topologies for future applications, the thermal management is challenging. Since the secondary-side conduction loss dominates the overall power loss in low-voltage high-current isolated dc-dc converters, a novel current tripler rectification topology is proposed. Theoretical analysis, comparison and experimental results verify that the proposed rectification technique has good thermal management and well-distributed power dissipation, simplified magnetic design and low copper loss for inductors and transformer. That is due to the fact that the load current is better distributed in three inductors and the rms current in transformer windings is reduced. Another challenge in telecommunication and computing applications is fast transient response of the converter to the increasing slew-rate of load current change. For instance, from Intel\u27s roadmap, it can be observed that the current slew rate of the age regulator has dramatically increased from 25A/uS in 1999 to 400A/us in 2005. One of the solutions to achieve fast transient response is secondary-side control technique to eliminate the delay of optocoupler to increase the system bandwidth. Active-clamp half bridge dc-dc converter with secondary-side control is presented and one industry standard 16th prototype is built and tested; good efficiency and transient response are shown in the experimental section. However, one key issue for implementation of secondary-side control is start-up. A new zero-voltage-switching buck-flyback isolated dc-dc converter with synchronous rectification is proposed, and it is only suitable for start-up circuit for secondary-side controlled converter, but also for house-keeping power supplies and standalone power supplies requiring multi-outputs

    Low Power Distribution Module for Space Applications: Analysis and Comparison of Different Architectures and DC/DC Topologies

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    The goal of this paper is to analyze and compare different possibilities for the specific design of the DC/DC Power Distribution Module for Space Application. Two architectures and, among them, four well known isolated (Half-Bridge, Push-Pull, Forward with Active Clamp (FWAC) and Flyback with Active Clamp (FLAC)) and nonisolated (Buck and Synchronous Buck) DC/DC topologies are analyzed and compared in terms of efficiency and size, meanwhile taking care of the cost, design time, reliability and flexibility of the whole system. In order to validate presented theoretical results, laboratory prototype for FWAC topology for 28V, 1:75A converter is built and measured. The prototype?s minimal 92:3% and maximal 93:2% efficiency match pretty good with expected 92:9% and 94%, respectively

    A High-Efficiency Isolated Wide Voltage Range DC-DC Converter Using WBG Devices

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    The recent release of the standard USB-PD 3.1 speci es variable output voltages from 5 V to 48 V featuring a step forward towards a universal adaptor but rising new challenges for the converter topologies used up to now. In such applications, a rst AC-DC stage is followed by a DC-DC stage. In this paper, emerging WBG technologies are applied to the asymmetrical half-bridge yback topology, demonstrating the potential of such combination as a wide voltage range DC-DC stage. Its suitability for high-density and high-ef ciency USB-PD Extended Power Range (EPR) and battery charger applications is discussed. The impact of different switching technologies, silicon and wide band gap, is analyzed. A general method to dimension the converter is presented and an iterative process is used to evaluate the theoretical ef ciency under different conditions and switching devices. Finally, the advantages of the presented converter using Gallium Nitride (GaN) devices are demonstrated in a 240 W DC-DC prototype. It achieves a full load ef ciency of 98%, and it is able to deliver an output voltage from 5 V to 48 V with input voltage range from 120 V to 420 V, as well an outstanding power density of 112 W/inch3 uncased.Infineon Technologies AG through the Spanish Regional Project P20_00265 BRNM-680-UGR20Spanish Ministry of Science MCIN/AEI PID2020-117344RB-I0

    Single Stage PFC Flyback AC-DC Converter Design

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    This paper discusses a 100 W single stage Power Factor Correction (PFC) flyback converter operating in boundary mode constant ON time methodology using a synchronous MOS-FET rectifier on the secondary side to achieve higher efficiency. Unlike conventional designs which use two stage approach such as PFC plus a LLC resonant stage or a two stage PFC plus flyback, the proposed design integrates the PFC and constant voltage regulation in a single stage without compromising the efficiency of the converter. The proposed design is advantageous as it has a lower component count. A design of 100 W flyback operating from universal input AC line voltage is demonstrated in this paper. The experimental results show that the power factor (PF) is greater than 0.92 and total harmonic distortion (iTHD) is less than 20% for a load varying from 25 % to 100 %. The experimental results show the advantages of a single stage design.Comment: Published in: 2020 IEEE International Conference on Electronics, Computing and Communication Technologies (CONECCT

    Topics in Analysis and Design of Primary Parallel Isolated Boost Converter

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    A Novel Adaptive Synchronous Rectification System for Low Output Voltage Isolated Converters

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    The design of efficient isolated low output voltage converters is a major concern due to their widespread use. One of the preferred methods used to maximize their efficiency is synchronous rectification (SR), i.e., the replacement of the secondary side diodes with MOSFETs to decrease conduction losses. However, depending on the topology being used, SR might not provide the required efficiency improvement or even be easily implemented. This paper presents a novel SR system that can be applied to converters with symmetrically driven transformers and to converters from the flyback family; in both cases, the proposed system adaptively generates a control signal that controls a synchronous rectifier MOSFET placed in parallel with each diode, turning it on during the conduction intervals of the diodes. The proposed system uses only information from the secondary side, thus avoiding breaking the isolation barrier; it can be built using a few low-cost analog components, is reliable and simple, and could be easily implemented in an integrated circuit. Up to a 3% improvement is demonstrated in a 3.3-5-V 120-W push-pull converter, and up to a 2.5% improvement is obtained in a 5-V 50-W flyback converter, with both of them designed for telecom application

    Grid converter for LED based intelligent light sources

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    Optimization of LLC resonant converters

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    Usualmente, na área da eletrónica de potência, tem que existir um trade off entre densidade de potencia e o rendimento, por forma a desenhar dispositivos que sejam pequenos o suficiente, para ocupar o mínimo espaço, mas ao mesmo tempo altamente eficientes, por forma a maximizar a energia consumida em trabalho resultante, especialmente em veículos elétricos, onde existem várias etapas de conversão de energia. O presente trabalho visa estudar os conversores ressonantes e as suas topologias associadas, continuando o estudo realizado pela Mestre Maria Ruxandra Luca em parceria com a Universidade de Oviedo, tendo como principal objetivo a otimização de um conversor ressonante LLC de 4.2 para carregamento de baterias. Este tipo de conversor é mais vantajoso quando comparado com os conversores tradicionais, devido à utilização do conceito de ressonância e de técnicas Soft Switching, como o Zero Current Switch (ZCS) e Zero Voltage Switch (ZVS). Estar em ressonância significa, ter um comportamento resistivo pelo facto da soma de todas as impedâncias do tanque de ressonante ser nula. Isto leva a que a corrente esteja em fase com a tensão, permitindo o mínimo de perdas, para uma situação em que o ganho do conversor é unitário. Porém, para alterar o valor da tensão da saída do conversor, este ganho tem que ser alterado (com a modulação de frequência), levando o conversor a trabalhar fora da sua zona de ressonância, com um desfasamento entre tensão e corrente, aumentando significativamente as perdas nos semicondutores comutadores. O uso de técnicas Soft Switching, como o Zero Current Switch (ZCS) e Zero Voltage Switch (ZVS), permite a minimização de perdas de comutação quando o conversor trabalha fora de ressonância, utilizando mecanismos como a equalização da corrente no transformador (entre corrente magnetizante e corrente série) e Dead-Time para fazer com que as comutações sejam feitas quando a corrente e a tensão estão a zero. Devido á menor taxa de perdas nas comutações, o uso de frequências mais elevadas é possível, obtendo assim conversores com uma maior densidade de potência, mantendo uma operação com elevada eficiência. Neste trabalho é apresentado um breve capítulo do estado da arte, em que diversos modos de conversão DC-DC são apresentados, comparando as suas vantagens e desvantagens, seguido de uma análise às arquiteturas e topologias mais utilizadas nos conversores ressonantes. Com o objetivo de aumentar a eficiência, são descritos os andares do conversor onde existem mais perdas, com as suas causas, e possíveis soluções como o uso de transístores de alta mobilidade de eletrões, (do Inglês High Electron Mobility Transitors HEMT) combinados com materiais wide band-gap, que permitem operar de forma mais eficiente quando comparados com semicondutores de silício, a utilização de air-gap distribuído, bobines entrelaçadas e o fio de Litz, para minimizar as correntes de Eddy produzidas no transformador, e ainda a utilização de retificação síncrona em substituição aos díodos retificadores. De seguida, num terceiro capítulo, é apresentada a configuração base do conversor LLC ressonante para o carregamento de baterias de iões de lítio, detalhando cada um dos blocos associados, acompanhado de uma análise teórica por forma a permitir compreender o funcionamento do conversor, quais os principais fatores mais importantes, e qual o impacto da frequência de comutação no comportamento do conversor. Neste capítulo é ainda apresentado o processo de desenho deste conversor discriminando quais os parâmetros iniciais necessários, com uma análise detalhadas das perdas associadas ao design base, finalizando com o estudo, das diferentes arquiteturas do conversor nos andares de conversão AC-DC e DC-AC, e da retificação síncrona com a utilização de HEMTs, na eficiência do conversor. Simulações serão então conduzidas posteriormente utilizando modelos reais dos componentes presentes no conversor, com o uso do software LTSpice, comparando de forma detalhada o design base, com os designs otimizados previamente obtidos, de forma a observar o impacto das alterações propostas. Inicialmente foi previsto construir o conversor apresentado em [1] e o conversor otimizado mais eficiente, testá-los experimentalmente, mas devido à situação atual da pandemia Sars-Cov (Covid 19), o mesmo não foi possível, a tempo de entregar este trabalho, sendo este, um dos trabalhos futuros. Este trabalho foi desenvolvido em parceria com a Universidad de Oviedo, com o grupo de investigação LEMUR na Escuela Politécnica de Ingeniería de Gijón, onde foram feitas as analises teóricas e simulações do conversor de ressonância LLC

    Very-high-frequency low-voltage power delivery

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    Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2013.Cataloged from PDF version of thesis.Includes bibliographical references (p. 217-223).Power conversion for the myriad low-voltage electronic circuits in use today, including portable electronic devices, digital electronics, sensors and communication circuits, is becoming increasingly challenging due to the desire for lower voltages, higher conversion ratios and higher bandwidth. Future computation systems also pose a major challenge in energy delivery that is difficult to meet with existing devices and design strategies. To reduce interconnect bottlenecks and enable more flexible energy utilization, it is desired to deliver power across interconnects at high voltage and low current with on- or over-die transformation to low voltage and high current, while providing localized voltage regulation in numerous zones. This thesis introduces elements for hybrid GaN-Si dc-de power converters operating at very high frequencies (VHF, 30-300 MHz) for low-voltage applications. Contributions include development of a new VHF frequency multiplier inverter suitable for step-down power conversion, and a Si CMOS switched-capacitor step-down rectifier. These are applied to develop a prototype GaN-Si hybrid dc-dc converter operating at 50 MHz. Additionally, this thesis exploits these elements to propose an ac power delivery architecture for low-voltage electronics in which power is delivered across the interconnect to the load at VHF ac, with local on-die transformation and rectification to dc. With the proposed technologies and emerging passives, it is predicted that the ac power delivery system can achieve over 90 % efficiency with greater than 1 W/mm² power density and 5:1 voltage conversion ratio. A prototype system has been designed and fabricated using a TSMC 0.25 [mu]m CMOS process to validate the concept. It operates at 50 MHz with output power of 4 W. The prototype converter has 8:1 voltage conversion ratio with input voltage of 20 V and output voltage of 2.5 V. To the author's best knowledge, this is the first ac power delivery architecture for low-voltage electronics ever built and tested.by Wei Li.Ph.D
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