Development of MIPI Camera Interface Prototype Adapter Board

This project is the development of the prototype FPGA (Field Programmable Gate Array)-Compatible MIPI CSI-2 (Camera Serial Interface) D-PHY adapter board. The FPGA used on the SpaceCube processor card does not have I/O that natively supports the D-PHY standard, and thus requires additional external components to adapt the interface to the FPGAs I/O. The goal of this project is to develop a prototype board with this external circuitry. The project tasks include 1) preliminary research and analysis of the adapter circuit requirements involving waveform comparisons, 2) signal processing chain tests for voltage measurements, 3) calculations from I/O channel system simulations in TI-TINA, 4) components’ values and circuit configuration verifications, 5) protoboard schematic entry, 6) both PCB footprint builds and PCB layout in Altium Designer, and lastly, 7) PCB manufacturing. The project requires the applications of fundamental electrical engineering laws such as Ohm’s Law and Kirchhoff’s Voltage Law for calculations of components’ values and signal analysis concepts to build the architecture of the prototype PCB during the iterative development process. The completed PCB shows the 3 receiver networks with confirmed values from the circuit simulations and waveform analyses, the 2 connectors with I/O pin reconfigurations, and both the differential trace pairs and single traces between the components and connectors. The trace routes are subjected to Altium’s rules, which enable efficient use of routing parameters for signal integrity. This adapter board is useful in data conversion and transmission from the MIPI camera module to the FPGA, a D- PHY circuit arrangement used in NASA’s SpaceCube Mini’s VADIR (Versatile Analog/Digital Interface) between the MIPI Camera module and the Backplane Connector. Once the adapter board PCB is fabricated and assembled, it can be used to demonstrate the validity of the circuit design prior to it being incorporated into the VADIR flight board design

Measuring the Phase Variation of a DOCSIS 3.1 Full Duplex Channel

Including a Full Duplex option into DOCSIS introduces several problems. One of the more troublesome issues is the presence of a strong self interference signal that leaks from the transmit side to the receive side of a cable node. This self interference is caused by echoes in the channel that translate the forward travelling transmit signals into a reverse travelling signal, as well as, by leakage from the hybrid coupler used to couple the upstream and downstream signals. To suppress this self interference an echo canceller is implemented to remove the unwanted interference from the received signal. Unfortunately with the high rates of data transmission used in modern day CATV networks the echo canceller needs tremendous precision. A major concern in the implementation of Full Duplex into DOCSIS is if the channels used are even very slightly time varying. The echos in such channels change with time and can be difficult for the echo canceller to track. Changes in the response of the channel cause the echo profile of the network to shift and the echo canceler to re-adapt to the new channel response. The issue with this changing response is that it is possible for the channel to change faster than the echo canceller can adapt, resulting in the interference becoming unacceptably high. Since the channel is a physical network of coaxial cables often exposed to the environment, its propagation properties can be affected by wind swaying pole mounted cables, or by rapid heating from the sun, or sudden shifts in the load of the network. With information on how the physical properties of the cable changes, the engineers designing the echo canceller can know how fast the canceller must adapt to changes and also have a better measure of how reliable its echo cancellation will be. In this thesis the stability of the echo profile of the channel is measured. It is shown that the property of the channel with the greatest potential to rapidly change and cause noise after echo cancellation is the phase response of the channel. Due to this, the approach of this thesis is to measure the fluctuations in the phase of the channel response of a CATV network constructed in the lab. To measure the fluctuations in the phase response of the channel, a PLL (Phase Locked Loop) based circuit is designed and built on an FPGA (Field Programmable Gate Array) and connected to a model of a simple CATV network. The PLL circuit used to measure the phase fluctuations of the channel is designed to be able to measure changes occurring faster than 0.1 Hz and with a power higher than $10^{-7} \: V^2$. The circuit is able to capture data from the channel over a period of 90 seconds. Using this phase variation measurement circuit a series of experiments were performed on a model CATV DOCSIS network. It was found that many physical disturbances to the network had the effect of rapidly shifting the phase response of the network. Heating the cables in the network was found to shift the phase response upwards of $20000\:\mu$radians. Flexing the cables in the network was found to have a peak phase variation of $8000\: \mu$radians with similar effects found from walking over cables. Overall, it was clear that physical effects on the network had the propensity to rapidly shift the network response. Any echo canceller that is designed in the future will have to consider these effects when reporting the cancellation that it is able to achieve

Lumped silicon photonic Mach-Zehnder modulators for high-speed optical interconnects

The boom in worldwide internet connectivity and cloud services has caused unprecedented need for high-bandwidth connections between and within data centres. Silicon photonics is becoming the platform of choice to provide low-cost, large-volume production of future optical transceivers. However, the scale of modern data centres introduces challenges of speed, reach and, crucially, energy consumption for these devices. Silicon photonic Mach-Zehnder modulators (MZMs) are one possibility for providing electrical-to-optical conversion at the transmit side of such fibre-optic links. In this thesis, comprehensive investigation is carried out into lumped MZMs, specifically, as their unterminated, capacitive load holds promise for lower power consumption than more typical travelling-wave MZMs with resistive terminations. Detailed characterisations and simulations of dual-drive silicon photonic lumped MZMs are made to investigate the key trade-off of modulation bandwidth and drive voltage. Drivers with low source impedance are investigated as a means of boosting lumped MZM bandwidths, while advanced modulation formats such as four-level pulse-amplitude modulation (PAM4) and electrical duobinary modulation (EDB) are also leveraged to provide more spectrally-efficient signals. In particular, experimental demonstration is made of a novel low-impedance, switched-capacitor PAM4 driver for a lumped MZM in a 30 Gb/s silicon photonic link over 10 km of optical fibre. Simulations are carried out to optimise the bias and doping levels of lumped MZMs used with such drivers. Predistortion methods are investigated through experiments and simulations as alternative ways to increase the bandwidth. A simple first-order FIR filter is shown experimentally to enable 25 Gb/s NRZ modulation with a low-bandwidth MZM, while more optimised precompensation enables 50 Gb/s PAM4 and EDB. Finally, simulations using an accurate equivalent circuit model for the lumped MZM demonstrate the potential for a well-designed driver with lowered source impedance and controlled amounts of inductive peaking to reduce the need for transmitter-side precompensation

The S2 VLBI Correlator: A Correlator for Space VLBI and Geodetic Signal Processing

We describe the design of a correlator system for ground and space-based VLBI. The correlator contains unique signal processing functions: flexible LO frequency switching for bandwidth synthesis; 1 ms dump intervals, multi-rate digital signal-processing techniques to allow correlation of signals at different sample rates; and a digital filter for very high resolution cross-power spectra. It also includes autocorrelation, tone extraction, pulsar gating, signal-statistics accumulation.Comment: 44 pages, 13 figure

Silicon-Organic Hybrid (SOH) and Plasmonic-Organic Hybrid (POH) integration

Silicon photonics offers tremendous potential for inexpensive high-yield photonic-electronic integration. Besides conventional dielectric waveguides, plasmonic structures can also be efficiently realized on the silicon photonic platform, reducing device footprint by more than an order of magnitude. However, nei-ther silicon nor metals exhibit appreciable second-order optical nonlinearities, thereby making efficient electro-optic modulators challenging to realize. These deficiencies can be overcome by the concepts of silicon-organic hybrid (SOH) and plasmonic-organic hybrid integration, which combine SOI waveguides and plasmonic nanostructures with organic electro-optic cladding materials