High Performance Tunable Active Inductors For Microwave Circuits

Tez (Doktora) -- İstanbul Teknik Üniversitesi, Fen Bilimleri Enstitüsü, 2016Thesis (PhD) -- İstanbul Technical University, Institute of Science and Technology, 2016RF uygulamalarında enduktif karakteristiğe önemli ölçüde ihtiyaç duyulmaktadır; bunlar, özellikle filtreler, düşük gürültülü yükselteçler (LNA, low noise amplifiers), gerilim kontrollü osilatörler (VCO, voltage controlled oscillators), pek çok farklı türde yükselteç için band genişliği iyileştirilmesi, faz kaydırıcılar, güç bölücüler ve eşleştirme (matching) devreleri vb. uygulamalardır. Pasif sarmal çip-içi CMOS endüktansların eksik yönleri ayrıntılı olarak literatürde tartışılmıştır. Bu tür endüktanslar düşük değer katsayısı (quality factor), düşük öz-rezonans frekansı (SRF, self-resonance frequency), sabit ve düşük değerli endüktans ve geniş bir silikon (silicon) alanı gerektirmeleri gibi istenmeyen özelliklere sahiptirler. Diğer yandan, MOS transistorlar kullanılarak sentezlenen CMOS aktif endüktansların, pasif sarmal eşdeğer yapıları ile karşılaştırıldığında pek çok çekici karakteristik özellik sunabildikleri gösterilmiştir. Bunlar; geniş bir bölgede ayarlanabilir öz-rezonans frekansı başarımı, geniş bir bölgede ayarlanabilir endüktans başarımı, geniş bir bölgede ayarlanabilir değer katsayısı başarımı, CMOS teknolojileri ile tümüyle gerçeklenebilme ve az alan kaplama gibi karakteristik özellikleri olarak ortaya konulmaktadır. Literatürde jiratör-C (GC) prensibi, topolojisi, karakterizasyonu ve uygulamaları ayrıntılı olarak ele alınmaktadır. İşlemsel geçiş-iletkenliği kuvvetlendiricisi (OTA, operational transconductance amplifier) ile gerçeklenen GC devreleri, RF uygulamaları için oldukça uygundur. Bu özellik, GC yapılarının söz konusu yapı kullanılarak en az sayıda aktif eleman ile gerçeklenebilmesinden kaynaklanmaktadır. Gerek topraklı (grounded) gerekse yüzen (floating) aktif endüktansların GC devreleri ile gerçeklenebildiği gösterilmiştir. Aktif endüktansların başarımlarının nicel olarak ölçülmesi amacıyla, çok sayıda ölçüt ortaya konulmuştur. Bu ölçütler frekans çalışma aralığı, endüktans ayarlanabilirliği, değer katsayısı, gürültü ve güç tüketimi gibi temel özellikleri içerirler. CMOS transistorların parazitik bileşenlerinden dolayı tasarlanan aktif endüktanslar belirli bir frekans bölgesinde endüktif davranış gösterirler. Alt frekans sınırı, GC devrelerinin sıfır frekansı ile belirlenirken; üst frekans sınırı ise öz-rezonans frekansı ile belirlenir. Aktif endüktansların pasif sarmal eşdeğer yapılarına göre en önemli üstünlüklerinden biri de; endüktanslarının geniş bir değer aralığıunda ayarlanabilir olmasıdır. GC aktif endüktansların endüktans değeri, transistorların geçiş-iletkenliklerinin ya da MOS varaktörlerle gerçeklenen yük kapasitanslarının değiştirilmesi ile ayarlanabilir. Literatürde, GC topolojisine dayalı pek çok CMOS AI (active inductor) devresi bildirilmiştir. Bunların tümü, farklı teknikler kullanılarak yüksek başarımlı AI yapıları oluşturmayı amaçlamışlardır. Bu tezde, bunlardan güncel olan bazı GAI (grounded AI) ve FAI (floating AI) yapıları gözden geçirilmiştir. Bunlardan bazıları, değer katsayısını (QF) iyileştirmek amacıyla, AI kaybını telafi etmek için negatif direnç kullanmışlardır. GC yapıları RF uygulamaları için tasarlandıklarında en az sayıda transistor kullanımı çok kritiktir. Çünkü bu durum AI öz-rezonans frekansının artmasına yardımcı olur. AI’ler, kazanç artırma amacıyla LNA’lerde geniş kullanım alanı bulabilmektedirler. Diğer taraftan, AI yapılarının en önemli dezvantajlarından biri gürültü başarımının pasif endüktanslara nispeten yüksek olmasıdır. Literatürde bu dezavantajı gidermek amacıyla teklif edilen yaklaşımlardan biri dejenerasyon direncinin bulunduğu bir geribesleme katı kullanılarak girişe gelen gürültü katkısını azaltmayı amaçlamıştır. Literatürde teklif edilen tekniklerin amacı, parazitik bileşenlerin etkisini azaltmak ya da tümüyle ortadan kaldırmaktır. Bu tezde, ileri devre teknikleri kullanılarak, yeni topraklı (grounded) ve yüzen (floting) AI yapıları tasarlanmıştır. AI giriş ve çıkış düğümlerine ait iletkenlikleri azaltmak için çoklu-düzenlenmiş kaskod (multi-regulated cascode, MRC) katları QF değerini iyileştirme amacıyla kullanılmaktadır. MRC katı PMOS transistorlarıyla oluşturulmuştur. PMOS transistor kullanımı, • ikinci kat kutuplamasını ayarlayabilmek amacıyla, giriş transistor boyutunun mümkün olduğunca azaltılmasını, • ana AC işaret yolundaki transistor sayısının azaltılmasını, sağlamaktadır. Tezde sunulan teorik analiz ve serim sonrası benzetim sonuçları, MRC katı kullanımının AI özelliklerine yaptığı etkiyi göstermektedir. Elde edilen sonuçlar bu katların AI tasarımında yüksek QF elde edilmesini imkan tanıdığını ortaya koynaktadır. Literatürde, iki ana AI başarım karakteristiği olan SRF ve QF başarımlarının iyileştirmesi için çok sayıda çalışma bulunmaktadır. Bu tezde, birbirlerini etkilemeksizin SRF ve QF başarımlarının ayarlanabilmesi özelliğine sahip bir AI’ın tasarımı ve benzetgimi yapılmıştır. Kaskod ve RC geribesleme yapıları yeni AI tasarımında kullanılmıştır. Daha önce de tartışıldığı üzere, AI karakterizasyonu açısından giriş transistoru çok önemlidir. Girişi transistorunun kaskodlanması, ilk jiratörün geçiş-iletkenliğinin ve giriş parazitik kapasitansının birbirinden bağımsız olarak ayarlanması gibi önemli ve kullanışlı bir özelliği beraberinde getirir. Bunun yanısıra, endüktansın değeri diğer transistorun iletkenliği ile ayarlanabilir. AI parazitik seri-rezistansını yok etmek amacıyla kullanılan RC geribeslemesi, QF iyileştirmesini sağlayabilmektedir. Kaskod transistorların kutuplama koşulu bir diyot-bağlı transistor ile sağlandığından; önerilen yapı proses, gerilim ve sıcaklık değişimleri açısından kararlı ve yüksek başarımlıdır. AI yapılarında karşılaşılan düşük gürültü başarımı, AI’ların LNA gibi RF uygulamalarda kullanımını sınırlamaktadır. Bir AI’ın ana gürültü kaynağı giriş transistorudur. Düşük gürültülü AI elde etmek için, giriş transistoru yeterince büyük boyutlu olarak tasarlanmalıdır. Ne var ki, büyük boyutlu böyle bir transistor, düşük bir SRF ve dolayısıyla sınırlı bir endüktif bandı beraberinde getirir. Bu tezde, düşük gürültülü ve az kayıplı uygun bir AI, düşük gürültü gerektiren RF uygulamaları için sunulmuştur. Teklif edilen AI devresindeki tüm transistorların ortak-kaynak (common-source, CS) yapısında kullanılması, düşük iletkenliğe sahip düğümlerin dolayısıyla yüksek QF değerine sahip bir AI’ın elde edilmesine olanak sağlamaktadır. AI gürültüsünü azaltmak için, sırasıyla P-tipi MOS transistorlar ve ileri-besleme yolu yapısı (feed-forward path, FFP) kullanılmaktadır. Bilindiği gibi, sensörler çok çeşitli fiziksel büyüklüklerin eletrik mühendisiliği alanına taşınmasını sağlamaktadır. Çok geniş kullanım alanı bulan sensör tiplerinden biri kapasitif mikro algılıyıcılardır. Kapasitif mikro algılayıcılar mekanik hareketleri küçük kapasitans değişimlerine çevirirler. Micro algılayıcıdaki kapasitans değişimi femto-Farad mertebesinde olup algılamayı zorlaştırmaktadır. Diğer yandan, küçük bir kapasitans değişimini yüksek bir empedans değişimine çevirebilmeleri dolayısıyla, GC topolojilerinin kapasitif algılayıcılarda kullanılabileceğini söylemek mümkündür. Bu tezde, bu düşünceden yola çıkılarak, kesit duyarlılığını yok etme yeteneğine sahip yeni bir 3-eksen ivme-ölçer tasarlanmıştır. Yapının, her eksendeki ivmeyi bağımsız olarak algılayabilmesi için, algılayıcı elektrodları uygun olarak yerleştirilmiştir. Daha sonra, bir kapasitif algılayıcıdaki çok küçük kapasitans değişimlerini algılayabilmek için yeni bir GC yapısı teklif edilmiştir. Önerilen yapıda, çalışma frekansı aralığı ve ölçekleme çarpanı, kutuplama akımlarının ayarlanması suretiyle birbirini etkilemeksizin ayarlanabilmektedir. Ayrıca, önerilen yapıda, parazitik bileşenlerin etkisini yok etmek için RC geribesleme ve kaskod yapılar kullanılmaktadır. Son olarak, bu tezde sunulan AI’ların çok amaçlı özellikte olduğunu göstermek amacıyla, 3 ve 6. dereceden geniş bantlı mikrodalga filtrelerde kullanılmaları ele alınmıştır. İlki 3. dereceden bir Chebyshev alçak geçiren filtredir. Basitleştirilmiş gerçel frekans tekniği (SRFT, simplified real frequency technique) ile tasarlanan ikincisi ise, 6. dereceden bir Chebyshev band geçiren filtredir. Filtrelerin benzetimle elde edilmiş frekans yanıtları, bu tezde sunulan AI’ların literatürdeki yapılara güçlü birer alternatif olduklarını ortaya koymaktadır.There is critical need for inductive characteristics in RF applications, especially in filters, LNA, VCO, bandwidth-enhancement in many kinds of amplifiers, phase shifters, power divider and matching networks. The drawbacks of using passive and spiral inductors in CMOS process are discussed in the literature. It is shown that these kind of inductors suffer from a low quality factor, a low self-resonant frequency, a low and fixed inductance value and the need for a large silicon area. Furthermore, it is shown in the literature that CMOS Active Inductors (AIs), which are synthesized using MOS transistors, offer a number of attractive characteristics as compared with their spiral counterparts. These characteristics include a low silicon consumption, a large and tunable self-resonant frequency, a large and tunable inductance, a large and tunable quality factor, and fully realizable in digital CMOS technologies. Then principles, topologies, characterizations and implementation of the Gyrator-C (GC) network is discussed in-depth. The GC networks, which are implemented by operational transconductance amplifier, are suitable for RF application. This property arises from their minimum usage of active elements. It is shown that both grounded and floating active inductors can be implemented by GC networks. To provide a quantitative measure of the performance of AIs, a number of figure-of-merits have been introduced in the thesis. These figure-of-merits include frequency range, inductance tunability, quality factor, noise and power consumption. Due to parasitic components of CMOS transistors, designed AIs have inductive behavior in a specified frequency range. The low frequency bound is set by the frequency of the zero of the gyrator-C networks while the upper frequency bound is set by Self-Resonance Frequency (SRF). One of the key advantages of active inductors over their spiral counterparts is the large tunability of their inductance. The inductance of GC AIs can be tuned by varying either the transconductances of the transconductors or the load capacitance, which is implemented by MOS varactor. Based on GC topology, there are many reported CMOS AI circuits in literature. All of them have tried to invent high performance AI by using different techniques. Some of recent proposed Grounded AI (GAI) and Floating AI (FAI) circuits are reviewed in the thesis. Some of them use negative resistor to compensate the loss of AI for QF enhancement. Some others try to use minimum number of transistors in order to increase the self-resonance frequency of AI for RF applications. In some applications, AIs are used in LNA circuits for gain boosting purpose. In that applications, designers have tried to cancel the noise of AI by using a feedback stage with a degeneration resistor to reduce the noise contribution to the input. The main aim of all the techniques is to cancel or reduce the effects of parasitic components. In the thesis, four new grounded and floating AIs are designed by using advanced circuit techniques. The first one, Multi Regulated Cascode (MRC) stages are employed for lowering conductance in input and output nodes of AI. Thus, Q performance is improved. Since these stages are used only for increasing impedance of input/output nodes, they are made up of PMOS transistors in order to: • minimize the input transistor as small as possible in order to adjust second stage biasing, • decrease the number of transistors in main path of AC signal Theoretical analysis and post-layout simulation results shows the effectiveness of using MRC stages usage in properties of AI. High Q symmetric floating version of low loss inductor is also designed by utilizing MRC stages. Designers do their best to improve SRF and QF, two main characteristics in term of AI performance. An AI with ability to adjust its SRF and QF without affecting each other is designed and simulated as a third. The cascoding and RC feedback structures are used in the new design of AI. As it discussed before, input transistor is very important regarding to AI characterizations. Cascoding input transistor gives the ability to adjust the first gyrator’s transconductance and input parasitic capacitance independently which it results in adjusting the self-resonance frequency and quality factor separately. Due to our best knowledge from literature reviewing, it is first time that the properties of an inductor can be adjusted independently. Furthermore, the inductance value can be adjusted by other transistor’s transconductances. Also, the RC feedback is utilized to cancel the parasitic series-resistance of AI which results in QF enhancement. Since, bias condition of cascoding transistors is provided by a diode-connected transistor, the proposed structure is robust in terms of performance over variation in process, voltage and temperature. The Noise of designed AIs has limited the use of them in RF applications such as LNAs. The main noise source of an AI is its input transistor. In order to have low noise AI, the input transistor should be designed large enough. But it leads to low SRF which limited the inductive frequency band. As a fourth active inductor design, a low-noise and low-loss AI is presented suitable for RF low noise applications. Utilizing all transistors in Common Sourse (CS) configuration on the AI circuit leads to low conductance nodes which causes the AI to have high Q. P-type MOS transistors and Feed-Forward Path (FFP) are employed to decrease noise of the AI, respectively. The GC topologies can convert a low capacitance variation to high impedance changing which makes it a good choice for capacitive sensors. The capacitive based micro sensors convert mechanical signals to small capacitance variation. The capacitance variation in micro sensor is in the range of femto-Farads which makes it difficult to sense. Thus, the GC topologies can be used in capacitive sensors in order to sense small capacitive variations. In the thesis, this technique is used in a new accelerometer sensor. It is first time that a gyrator-C network is employed as an interface circuit for capacitive change detection in micro sensors. The new accelerometer structure is designed by using with ability to cancel cross section sensitivity. The sensor’s electrodes are located in such a way that enables the structure to detect acceleration in 3-axis independently. Embedding all 3-axis detecting electrodes in a single proof mass and ability to detect acceleration orientation are salient features of the proposed sensor. Consequently, a new GC configuration for sensing very small capacitance changes in a capacitive sensor is presented in the thesis. In the proposed configuration, the operating frequency range and scaling factor can be adjusted without affecting each other by tuning the bias currents of utilized gyrators. In addition, the proposed configuration employs RC feedback together with the cascoding technique to cancel the effect of the parasitic components in order to get accurate scaling from gyrator-C network. Finally, in order to show versatility of designed AIs, they are used in designed third and sixth order broadband microwave filters. The first one is a third order Chebyshev low pass filter. The second one, which is designed by using simplified real frequency technique is a sixth order Chebyshev band pass filter. The simulated frequency response of filters prove the workability of the designed AIs.DoktoraPh

Streamlining the Design and Use of Array Coils for In Vivo Magnetic Resonance Imaging of Small Animals

Small-animal models such as rodents and non-human primates play an important pre-clinical role in the study of human disease, with particular application to cancer, cardiovascular, and neuroscience models. To study these animal models, magnetic resonance imaging (MRI) is advantageous as a non-invasive technique due to its versatile contrast mechanisms, large and flexible field of view, and straightforward comparison/translation to human applications. However, signal-to-noise ratio (SNR) limits the practicality of achieving the high-resolution necessary to image the smaller features of animals in an amount of time suitable for in vivo animal MRI. In human MRI, it is standard to achieve an increase in SNR through the use of array coils; however, the design, construction, and use of array coils for animal imaging remains challenging due to copper-loss related issues from small array elements and design complexities of incorporating multiple elements and associated array hardware in a limited space. In this work, a streamlined strategy for animal coil array design, construction, and use is presented and the use for multiple animal models is demonstrated. New matching network circuits, materials, assembly techniques, body-restraining systems and integrated mechanical designs are demonstrated for streamlining high-resolution MRI of both anesthetized and awake animals. The increased SNR achieved with the arrays is shown to enable high-resolution in vivo imaging of mice and common marmosets with a reduced time for experimental setup

Finite volume analysis of temperature effects induced by active MRI implants with cylindrical symmetry: 1. Properly working devices

BACKGROUND: Active Magnetic Resonance Imaging implants are constructed as resonators tuned to the Larmor frequency of a magnetic resonance system with a specific field strength. The resonating circuit may be embedded into or added to the normal metallic implant structure. The resonators build inductively coupled wireless transmit and receive coils and can amplify the signal, normally decreased by eddy currents, inside metallic structures without affecting the rest of the spin ensemble. During magnetic resonance imaging the resonators generate heat, which is additional to the usual one described by the specific absorption rate. This induces temperature increases of the tissue around the circuit paths and inside the lumen of an active implant and may negatively influence patient safety. METHODS: This investigation provides an overview of the supplementary power absorbed by active implants with a cylindrical geometry, corresponding to vessel implants such as stents, stent grafts or vena cava filters. The knowledge of the overall absorbed power is used in a finite volume analysis to estimate temperature maps around different implant structures inside homogeneous tissue under worst-case assumptions. The "worst-case scenario" assumes thermal heat conduction without blood perfusion inside the tissue around the implant and mostly without any cooling due to blood flow inside vessels. RESULTS: The additional power loss of a resonator is proportional to the volume and the quality factor, as well as the field strength of the MRI system and the specific absorption rate of the applied sequence. For properly working devices the finite volume analysis showed only tolerable heating during MRI investigations in most cases. Only resonators transforming a few hundred mW into heat may reach temperature increases over 5 K. This requires resonators with volumes of several ten cubic centimeters, short inductor circuit paths with only a few 10 cm and a quality factor above ten. Using MR sequences, for which the MRI system manufacturer declares the highest specific absorption rate of 4 W/kg, vascular implants with a realistic construction, size and quality factor do not show temperature increases over a critical value of 5 K. CONCLUSION: The results show dangerous heating for the assumed "worst-case scenario" only for constructions not acceptable for vascular implants. Realistic devices are safe with respect to temperature increases. However, this investigation discusses only properly working devices. Ruptures or partial ruptures of the wires carrying the electric current of the resonance circuits or other defects can set up a power source inside an extremely small volume. The temperature maps around such possible "hot spots" should be analyzed in an additional investigation

Advanced control architectures for grid connected and standalone converter systems

This dissertation proposes new control algorithms dedicated towards improving the reliability, computational burden and stability in grid-connected and stand-alone based power electronic converter systems applicable for ac microgrids. Two voltage sensorless control architectures, one for stand-alone applications and the other for grid-connected application are established in this thesis. The output voltage of a standalone single-phase inverter is controlled directly by controlling the output filter capacitor current without using a dedicated output voltage sensor. A method to estimate the output filter capacitance is also presented. For the grid connected converter, a novel closed loop estimation is presented to estimate the grid voltage. In addition to the estimation of the grid voltage, the proposed method also generates the unit vectors and frequency information similar to a conventional phase-locked loop structure. The voltage sensorless algorithm is then extended to LCL filter based grid connected converters thereby proposing a new indirect method of controlling the grid current. Furthermore, addressing the stability issues in current-controlled grid tied converters, this dissertation also analyzes the power angle synchronization control of grid-tied bidirectional converters for low voltage grids. The power flow equations for the low voltage grid are analyzed and compensators are designed to ensure the decoupled control of active and reactive power. It is demonstrated that the proposed compensators are immune to grid fluctuations and ensure stable operation controlling the desired power flow to and from the grid. Detailed plant modeling, controller design, simulation and experimental results are presented for all of the proposed schemes --Abstract, page iv

HIGH EFFICIENCY BASE DRIVE DESIGNS FOR POWER CONVERTERS USING SILICON CARBIDE BIPOLAR JUNCTION TRANSISTORS

This thesis explores the base driver designs for Silicon Carbide Bipolar Junction Transistors (SiC BJTs) and their applications for power converters. SiC is a wide bandgap semiconductor which has been the focus of recent researches as it has overcome the several of physical restrictions set by the silicon material. Compared with silicon bipolar devices, SiC BJTs have several advantages including a higher maximum junction temperature, higher current gain and lower switching power losses. Transient power losses are low and temperature-independent in a wide range of junction temperatures. With junction temperature capable of being between 25ºC to 240ºC, SiC BJTs have been of great interest in industry. As a current-driven device, the base driver power consumption is always a major concern. Therefore, high efficiency base drive designs for SiC BJT need to be investigated before this power device can be widely used in industry

Demonstration of fully integrated parity-time-symmetric electronics

Harnessing parity-time (PT) symmetry with balanced gain and loss profiles has created a variety of opportunities in electronics from wireless energy transfer to telemetry sensing and topological defect engineering. However, existing implementations often employ ad-hoc approaches at low operating frequencies and are unable to accommodate large-scale integration. Here, we report a fully integrated realization of PT-symmetry in a standard complementary metal-oxide-semiconductor technology. Our work demonstrates salient PT-symmetry features such as phase transition as well as the ability to manipulate broadband microwave generation and propagation beyond the limitations encountered by exiting schemes. The system shows 2.1 times bandwidth and 30 percentage noise reduction compared to conventional microwave generation in oscillatory mode and displays large non-reciprocal microwave transport from 2.75 to 3.10 gigahertz in non-oscillatory mode due to enhanced nonlinearities. This approach could enrich integrated circuit (IC) design methodology beyond well-established performance limits and enable the use of scalable IC technology to study topological effects in high-dimensional non-Hermitian systems.Comment: 52 pages (16 pages Main Text, 28 pages Supplementary Materials, 4 pages reference), 27 figures (4 figures Main Text, 23 figures Supplementary Materials), 93 references (50 references Main Text, 43 references Supplementary Materials

The integration of input filters in electrical drives

PhD ThesisThe integration of passive components such as inductors and capacitors has gained significant popularity in integrated drive research, and future power electronics systems will require more integrated and standardised packages. These give rise to better power density and improved performance. However, packaging techniques and passive components have been considered a technological barrier which is limiting advances in power electronics. The focus on size reduction should be turned towards the passive components, such as converter chokes, DC-link capacitors and electromagnetic interference (EMI) filters, and achieving greater power density depends on innovative integration concepts, flexibility in structures and extended operating temperature ranges while system integration and modularity are not mutually exclusive. This research considers the possibility of integrating input power filter components into electric machines. Particular attention is paid to the integration of electromagnetic line filter inductors to give better utilisation of the motor volume and envelope. This can be achieved by sharing the machine’s magnetic circuit. An LCL line filter has been chosen to be integrated with a gridconnected permanent magnet synchronous machine. Machines have been proposed in this study for low speed (3000 RPM) and high speed (25000 RPM) operation. The two machines have similar dimensions, but the low-speed machine is less challenging in terms of losses and filter integration, so attention is directed more to the high-speed machine. Both are supplied with low- and high-power drives at power ratings of 4.5 kW and 38 kW respectively. Several novel techniques have been investigated to integrate filter inductors into the electrical machines to produce a single mechanically packaged unit without significant increases in size and losses. Different approaches have been simulated using finite element analysis (FEA) to assess the effectiveness of the integration of passives within the machine structure. Each design has been iteratively optimised to determine the best mass of copper and core for the integrated filter inductors, targeting parity in power density when compared to traditional separate packages. The research demonstrates that an approach utilising a double-slot stator machine (named the integrated double slot (IDS) machine) with input filters wound into the outermost slots is the most appropriate choice in terms of achieving higher power density. The integrated filter inductors mimic the electromagnetic behaviour of the discrete industrially packaged inductors but with a volume reduction of 87.6%. A prototype of the IDS machine design of a 38 kW, 25000 RPM, including filter inductors was manufactured and testedthe General Electricity Company of Libya (GECOL), the Engineering and Physical Sciences Research Council (EPSRC), and the Engineering Doctorate scheme at Newcastle University