A 1.8 v Gm-C Highly Tunable Low Pass Filter for Sensing Applications

This paper presents a fully integrated, first-order Low Pass Filter with 2-tuning points giving a wide versatility to the filter. It allows for a fine/thick tuning with a cutoff frequency that spans over several orders of magnitude, from 220 mHz to 39.1 kHz. The Gm-C filter proposed is designed in a 180 nm CMOS technology with a total power consumption of 1.08 µW for a 1.8 V power supply and a dynamic range up to 73 dB. The proposed filter is a very competitive solution compared with previously reported works, meeting the requirements for portable on chip sensor interfaces based on impedance spectroscopy and biosignal front-end interfaces

1.0 v-0.18 µm CMOS tunable low pass filters with 73 db dr for on-chip sensing acquisition systems

This paper presents a new approach based on the use of a Current Steering (CS) technique for the design of fully integrated Gm–C Low Pass Filters (LPF) with sub-Hz to kHz tunable cut-off frequencies and an enhanced power-area-dynamic range trade-off. The proposed approach has been experimentally validated by two different first-order single-ended LPFs designed in a 0.18 µm CMOS technology powered by a 1.0 V single supply: a folded-OTA based LPF and a mirrored-OTA based LPF. The first one exhibits a constant power consumption of 180 nW at 100 nA bias current with an active area of 0.00135 mm2 and a tunable cutoff frequency that spans over 4 orders of magnitude (~100 mHz–152 Hz @ CL = 50 pF) preserving dynamic figures greater than 78 dB. The second one exhibits a power consumption of 1.75 µW at 500 nA with an active area of 0.0137 mm2 and a tunable cutoff frequency that spans over 5 orders of magnitude (~80 mHz–~1.2 kHz @ CL = 50 pF) preserving a dynamic range greater than 73 dB. Compared with previously reported filters, this proposal is a competitive solution while satisfying the low-voltage low-power on-chip constraints, becoming a preferable choice for general-purpose reconfigurable front-end sensor interfaces

Low-Noise Micro-Power Amplifiers for Biosignal Acquisition

There are many different types of biopotential signals, such as action potentials (APs), local field potentials (LFPs), electromyography (EMG), electrocardiogram (ECG), electroencephalogram (EEG), etc. Nerve action potentials play an important role for the analysis of human cognition, such as perception, memory, language, emotions, and motor control. EMGs provide vital information about the patients which allow clinicians to diagnose and treat many neuromuscular diseases, which could result in muscle paralysis, motor problems, etc. EEGs is critical in diagnosing epilepsy, sleep disorders, as well as brain tumors. Biopotential signals are very weak, which requires the biopotential amplifier to exhibit low input-referred noise. For example, EEGs have amplitudes from 1 μV [microvolt] to 100 μV [microvolt] with much of the energy in the sub-Hz [hertz] to 100 Hz [hertz] band. APs have amplitudes up to 500 μV [microvolt] with much of the energy in the 100 Hz [hertz] to 7 kHz [hertz] band. In wearable/implantable systems, the low-power operation of the biopotential amplifier is critical to avoid thermal damage to surrounding tissues, preserve long battery life, and enable wirelessly-delivered or harvested energy supply. For an ideal thermal-noise-limited amplifier, the amplifier power is inversely proportional to the input-referred noise of the amplifier. Therefore, there is a noise-power trade-off which must be well-balanced by the designers. In this work I propose novel amplifier topologies, which are able to significantly improve the noise-power efficiency by increasing the effective transconductance at a given current. In order to reject the DC offsets generated at the tissue-electrode interface, energy-efficient techniques are employed to create a low-frequency high-pass cutoff. The noise contribution of the high-pass cutoff circuitry is minimized by using power-efficient configurations, and optimizing the biasing and dimension of the devices. Sufficient common-mode rejection ratio (CMRR) and power supply rejection ratio (PSRR) are achieved to suppress common-mode interferences and power supply noises. Our design are fabricated in standard CMOS processes. The amplifiers’ performance are measured on the bench, and also demonstrated with biopotential recordings

Digital-Based Analog Processing in Nanoscale CMOS ICs for IoT Applications

L'abstract è presente nell'allegato / the abstract is in the attachmen

Low-Voltage, Low-Area, nW-Power CMOS Digital-Based Biosignal Amplifier

This paper presents the operation principle and the silicon characterization of a power efficient ultra-low voltage and ultra-low area fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA). Measured results in 180nm CMOS prototypes show that the proposed BioDIGOTA is able to work with a supply voltage down to 400 mV, consuming only 95 nW. Owing to its intrinsically highly-digital feature, the BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art, while keeping reasonable system performance, such as 7.6 NEF with 1.25 μVRMS input referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of CMRR and 55 dB of PSRR

Dopamiinin hapettumisen lukija-anturirajapinta 65 nm CMOS teknologialla

Sensing and monitoring of neural activities within the central nervous system has become a fast-growing area of research due to the need to understand more about how neurons communicate. Several neurological disorders such as Parkinson’s disease, Schizophrenia, Alzeihmers and Epilepsy have been reported to be associated with imbalance in the concentration of neurotransmitters such as glutamate and dopamine [1] - [5]. Hence, this thesis proposes a solution for the measurement of dopamine concentration in the brain during neural communication. The proposed design of the dopamine oxidation readout sensor interface is based on a mixed-signal front-end architecture for minimizing noise and high resolution of detected current signals. The analog front-end is designed for acquisition and amplification of current signals resulting from oxidation and reduction at the biosensor electrodes in the brain. The digital signal processing (DSP) block is used for discretization of detected dopamine oxidation and reduction current signals that can be further processed by an external system. The results from the simulation of the proposed design show that the readout circuit has a current resolution of 100 pA and can detect minimum dopamine concentration of 10 μMol based on measured data from novel diamond-like carbon electrodes [6]. Higher dopamine concentration can be detected from the sensor interface due to its support for a wide current range of 1.2 μA(±600 nA). The digital code representation of the detected dopamine has a resolution of 14.3-bits with RMS conversion error of 0.18 LSB which results in an SNR of 88 dB at full current range input. However, the attained ENOB is 8-bits due to the effect of nonlinearity in the oscillator based ADC. Nonetheless, the achieved resolution of the readout circuit provides good sensitivity of released dopamine in the brain which is useful for further understanding of neurotransmitters and fostering research into improved treatments of related neurodegenerative diseases.Keskushermoston aktiivisuuden havainnointi ja tarkkailu on muodostunut tärkeäksi tutkimusalaksi, sillä tarve ymmärtää neuronien viestintää on kasvanut. Monien hermostollisten sairauksien kuten Parkinsonin taudin, skitsofrenian, Alzheimerin taudin ja epilepsian on huomattu aiheuttavan muutoksia välittäjäaineiden, kuten glutamaatin ja dopamiinin, pitoisuuksissa [1] - [5]. Aiheeseen liittyen tässä työssä esitetään ratkaisu dopamiinipitoisuuden mittaamiseksi aivoista. Esitetty dopamiinipitoisuuden lukijapiiri perustuu sekamuotoiseen etupäärakenteeseen, jolla saavutetaan matala kohinataso ja hyvä tarkkuus signaalien ilmaisemisessa. Suunniteltu analoginen etupää kykenee lukemaan ja vahvistamaan dopamiinipitoisuuden muutosten aiheuttamia virran muutoksia aivoihin asennetuista elektrodeista. Digitaalisen signaalinkäsittelyn avulla voidaan havaita dopamiinin hapettumis-ja pelkistymisvirtasignaalit, ja välittää ne edelleen ulkoisen järjestelmän muokattavaksi. Simulaatiotulokset osoittavat, että suunniteltu piiri saavuttaa 100 pA virran erottelukyvyn. Simuloinnin perustuessa hiilipohjaisiin dopamiinielektrodeihin piiri voi havaita 10 μMol dopamiinipitoisuuden [6]. Myös suurempia dopamiinipitoisuuksia voidaan havaita, sillä etupäärajapinta tukee 1.2 μA(±600 nA) virta-aluetta. Digitaalinen esitysmuoto tukee 14.3 bitin esitystarkkuutta 0.18 bitin RMS virheellä saavuttaen 88 dB dynaamisen virta-alueen. Saavutettu ENOB (tehollinen bittimäärä) on kuitenkin 8 bittiä oskillaattoripohjaisen ADC:n (analogia-digitaalimuuntimen) epälineaarisuuden takia. Saavutettu tarkkuus tuottaa hyvän herkkyyden dopamiinin havaitsemiseksi ja hyödyttää siten välittäjäainetutkimusta ja uusien hoitomuotojen kehittämistä hermostollisiin sairauksiin

Low-voltage, low-area, nW-power CMOS digital-based biosignal amplifier

This paper presents the operation principle and the silicon characterization of a power efficient ultra-low voltage and ultra-low area fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA). Measured results in 180nm CMOS prototypes show that the proposed BioDIGOTA is able to work with a supply voltage down to 400 mV, consuming only 95 nW. Owing to its intrinsically highly-digital feature, the BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22× times compared to the current state of the art, while keeping reasonable system performance, such as 7.6 NEF with 1.25 μVRMS input referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of CMRR and 55 dB of PSRR

Digital-based analog processing in nanoscale CMOS ICs for IoT applications

The Internet-of-Things (IoT) concept has been opening up a variety of applications, such as urban and environmental monitoring, smart health, surveillance, and home automation. Most of these IoT applications require more and more power/area efficient Complemen tary Metal–Oxide–Semiconductor (CMOS) systems and faster prototypes (lower time-to market), demanding special modifications in the current IoT design system bottleneck: the analog/RF interfaces. Specially after the 2000s, it is evident that there have been significant improvements in CMOS digital circuits when compared to analog building blocks. Digital circuits have been taking advantage of CMOS technology scaling in terms of speed, power consump tion, and cost, while the techniques running behind the analog signal processing are still lagging. To decrease this historical gap, there has been an increasing trend in finding alternative IC design strategies to implement typical analog functions exploiting Digital in-Concept Design Methodologies (DCDM). This idea of re-thinking analog functions in digital terms has shown that Analog ICs blocks can also avail of the feature-size shrinking and energy efficiency of new technologies. This thesis deals with the development of DCDM, demonstrating its compatibility for Ultra-Low-Voltage (ULV) and Power (ULP) IoT applications. This work proves this state ment through the proposing of new digital-based analog blocks, such as an Operational Transconductance Amplifiers (OTAs) and an ac-coupled Bio-signal Amplifier (BioAmp). As an initial contribution, for the first time, a silicon demonstration of an embryonic Digital-Based OTA (DB-OTA) published in 2013 is exhibited. The fabricated DB-OTA test chip occupies a compact area of 1,426 µm2 , operating at supply voltages (VDD) down to 300 mV, consuming only 590 pW while driving a capacitive load of 80pF. With a Total Harmonic Distortion (THD) lower than 5% for a 100mV input signal swing, its measured small-signal figure of merit (FOMS) and large-signal figure of merit (FOML) are 2,101 V −1 and 1,070, respectively. To the best of this thesis author’s knowledge, this measured power is the lowest reported to date in OTA literature, and its figures of merit are the best in sub-500mV OTAs reported to date. As the second step, mainly due to the robustness limitation of previous DB-OTA, a novel calibration-free digital-based topology is proposed, named here as Digital OTA (DIG OTA). A 180-nm DIGOTA test chip is also developed exhibiting an area below the 1000 µm2 wall, 2.4nW power under 150pF load, and a minimum VDD of 0.25 V. The proposed DIGOTA is more digital-like compared with DB-OTA since no pseudo-resistor is needed. As the last contribution, the previously proposed DIGOTA is then used as a building block to demonstrate the operation principle of power-efficient ULV and ultra-low area (ULA) fully-differential, digital-based Operational Transconductance Amplifier (OTA), suitable for microscale biosensing applications (BioDIGOTA) such as extreme low area Body Dust. Measured results in 180nm CMOS confirm that the proposed BioDIGOTA can work with a supply voltage down to 400 mV, consuming only 95 nW. The BioDIGOTA layout occupies only 0.022 mm2 of total silicon area, lowering the area by 3.22X times compared to the current state of the art while keeping reasonable system performance, such as 7.6 Noise Efficiency Factor (NEF) with 1.25 µVRMS input-referred noise over a 10 Hz bandwidth, 1.8% of THD, 62 dB of the common-mode rejection ratio (CMRR) and 55 dB of power supply rejection ratio (PSRR). After reviewing the current DCDM trend and all proposed silicon demonstrations, the thesis concludes that, despite the current analog design strategies involved during the analog block development

A 5.5 μW 42nV/√Hz Chopper stabilized Amplifier for Biomedical Application with Input Impedance Enhancement

The continuous real-time monitoring of diverse physical parameters using biosignals like ECG and EEG requires the biomedical sensors. Such sensor consists of analog frontend unit for which low noise and low power Operational transconductance amplifier (OTA) is essential. In this paper, the novel chopper-stabilized bio-potential amplifier is proposed. The chopper stabilization technique is used to reduce the offset and flicker noise. Further, the OTA is likewise comprised of a method to enhance the input impedance without consuming more power. Also, the ripple reduction technique is used at the output branch of the OTA. The designed amplifier consumes 5.5 μW power with the mid-band gain of 40dB. The pass-band for the designed amplifier is 0.1Hz to 1KHz. The input impedance is likewise boosted with the proposed method. The noise is 42 nV/√Hz with CMRR of 82 dB. All simulations are carried out in 180nm parameters

Advances in Microelectronics for Implantable Medical Devices

Implantable medical devices provide therapy to treat numerous health conditions as well as monitoring and diagnosis. Over the years, the development of these devices has seen remarkable progress thanks to tremendous advances in microelectronics, electrode technology, packaging and signal processing techniques. Many of today’s implantable devices use wireless technology to supply power and provide communication. There are many challenges when creating an implantable device. Issues such as reliable and fast bidirectional data communication, efficient power delivery to the implantable circuits, low noise and low power for the recording part of the system, and delivery of safe stimulation to avoid tissue and electrode damage are some of the challenges faced by the microelectronics circuit designer. This paper provides a review of advances in microelectronics over the last decade or so for implantable medical devices and systems. The focus is on neural recording and stimulation circuits suitable for fabrication in modern silicon process technologies and biotelemetry methods for power and data transfer, with particular emphasis on methods employing radio frequency inductive coupling. The paper concludes by highlighting some of the issues that will drive future research in the field