A two-stage power amplifier design for ultra-wideband applications

In this paper, a two-stage 0.18 μm CMOS power amplifier (PA) for ultra-wideband (UWB) 3 to 5 GHz based on common source inductive degeneration with an auxiliary amplifier is proposed. In this proposal, an auxiliary amplifier is used to place the 2nd harmonic in the core amplified in order to make up for the gain progression phenomena at the main amplifier output node. Simulation results show a power gain of 16 dB with a gain flatness of 0.4 dB and an input 1 dB compression of about -5 dBm from 3 to 5 GHz using a 1.8 V power supply consuming 25 mW. Power added efficiency (PAE) of around 47% at 4 GHz with 50 Ω load impedance was also observed

Vidutinių dažnių 5G belaidžių tinklų galios stiprintuvų tyrimas

This dissertation addresses the problems of ensuring efficient radio fre-quency transmission for 5G wireless networks. Taking into account, that the next generation 5G wireless network structure will be heterogeneous, the device density and their mobility will increase and massive MIMO connectivity capability will be widespread, the main investigated problem is formulated – increasing the efficiency of portable mid-band 5G wireless network CMOS power amplifier with impedance matching networks. The dissertation consists of four parts including the introduction, 3 chapters, conclusions, references and 3 annexes. The investigated problem, importance and purpose of the thesis, the ob-ject of the research methodology, as well as the scientific novelty are de-fined in the introduction. Practical significance of the obtained results, defended state-ments and the structure of the dissertation are also included. The first chapter presents an extensive literature analysis. Latest ad-vances in the structure of the modern wireless network and the importance of the power amplifier in the radio frequency transmission chain are de-scribed in detail. The latter is followed by different power amplifier archi-tectures, parameters and their improvement techniques. Reported imped-ance matching network design methods are also discussed. Chapter 1 is concluded distinguishing the possible research vectors and defining the problems raised in this dissertation. The second chapter is focused around improving the accuracy of de-signing lumped impedance matching network. The proposed methodology of estimating lumped inductor and capacitor parasitic parameters is dis-cussed in detail provi-ding complete mathematical expressions, including a summary and conclusions. The third chapter presents simulation results for the designed radio fre-quency power amplifiers. Two variations of Doherty power amplifier archi-tectures are presented in the second part, covering the full step-by-step de-sign and simulation process. The latter chapter is concluded by comparing simulation and measurement results for all designed radio frequency power amplifiers. General conclusions are followed by an extensive list of references and a list of 5 publications by the author on the topic of the dissertation. 5 papers, focusing on the subject of the discussed dissertation, have been published: three papers are included in the Clarivate Analytics Web of Sci-ence database with a citation index, one paper is included in Clarivate Ana-lytics Web of Science database Conference Proceedings, and one paper has been published in unreferred international conference preceedings. The au-thor has also made 9 presentations at 9 scientific conferences at a national and international level.Dissertatio

Baseband linearization schemes for high efficiency power amplifiers

High efficiency and high linearity microwave power amplifiers (PAs) are a critical element in modern wireless applications. Over recent years, modern communica-tions systems and the complex modulated signals they use have presented signif-icant challenges in terms of maintaining acceptable efficiency and achieving the high degrees of linearity required in microwave radio frequency power amplifier (RFPA) designs. The next ‘big’ challenge is the deployment of the fifth-generation (5G) mobile network, which is scheduled for commercial launch in 2020. Although the specification for 5G is not completely known at this point, the expectations in terms of what 5G will bring most certainly are; including 1000x more capacity, less than 1ms latency and 100x network energy efficiency. New 5G systems will need to provide higher spectral efficiency, wide and fragmented signal spectra and dy-namic spectrum access (DSA). As a result, the waveforms used in 5G systems will be characterised by high peak to average power ratio (PAPR) and high bandwidth, especially for high data rate applications, which brings additional challenges in terms of achieving system efficiency and linearity. Digital Predistortion (DPD) has been widely and very successfully applied in modern communication systems to linearize PAs and meet system require-ments. However, as the signal bandwidth widens and carrier aggregation be-comes commonplace in 5G system, higher complexity DPD algorithms and an Abstract II increased number of associated parameters will be required. This will inevitably result in a more complex DPD systems with higher power consumption and overall, lower system efficiency. This is especially problematic when systems advance into massive multiple-input, multiple-output (MIMO) scenarios, where the distrib-uted systems are smaller in size and massive in number. The research work in this thesis starts by analysing the different nonlinear distortion mechanisms present in the typical microwave power transistor devices that would be deployed in an RFPA within a 5G system. A tunable analytical device model is established to investigate the individual contributions of key nonlinear el-ements in the device. A number of important observations, such as “sweet-spots”, sideband asymmetry and drive dependent optimum baseband termination have been discovered and analysed in detail. Using the developed analytical model, a linearity optimization strategy in circuit design has been discussed and applied to a commercially available and widely used nonlinear device model CGH60015D from Cree (now Wolfspeed). For the first time, a systematic study of all main non-linear components has been done and the interaction between these components has been discussed. In the second part of the thesis, a pair of novel system-level envelope do-main linearization techniques are presented and analysed. They are applied at the input node and output node of the power amplifier, respectively. The envelop line-arization techniques have been demonstrated with both the analytical model, de-veloped in this thesis, and the nonlinear device model CGH60015D. The Abstract III advantages of envelope linearization has been discussed as well as the challenges such an approach presents. The Linearizability of a system, both in terms of circuit design and lineariza-tion techniques are discussed. In fact, linearity and linearizability of power amplifi-ers forms the central thread that runs through this thesis together with linearity, which provides guidance for a top-to-bottom level PA linearization strategy

Broadband Doherty Power Amplifiers with Enhanced Linearity for Emerging Radio Transmitters

The ever-increasing demand for utilizing wireless spectra has led to development of spectrally efficient radio systems. While these systems offer much higher data throughput, they employ more sophisticated modulation schemes, which result in wideband signals with high peak-to-average power ratios. These signal characteristics significantly complicate the design of RF transmitters, particularly power amplifiers, in terms of power efficiency and linearity requirements. Furthermore, upcoming wireless standards, such as long term evolution advanced (LTE-A) require adoption of carrier aggregation which incorporates multiple component carriers to yield aggregated channels of larger bandwidth (up to 100 MHz). On the other hand, the emerging systems are expected to support legacy standards with minimum area, cost, and power overhead, and thus call for highly-efficient linear broadband power amplifiers capable of efficiently amplifying concurrent modulated signals located over a broad carrier frequency range. This thesis focuses on Doherty power amplifiers (DPAs) with extended high-efficiency range, enhanced bandwidth and improved linearity as a solution for high-efficiency multi-band multi-standard transmitters. It addresses three major concerns associated with DPAs, namely, back-off efficiency, bandwidth, and linearity. The Thesis begins with a detailed theoretical analysis of two-way and three-way Doherty configurations from which the governing equations are derived. This is followed by a comprehensive study of bandwidth limitation in DPA variants. As the first contribution, it is shown that the two existing three-way Doherty structures, i.e., conventional and modified DPAs have inherently broadband characteristics and thus are promising solutions for multi-standard base station transmitters. As a proof of concept, a 30-W three-way modified Doherty amplifier was designed and implemented using packaged GaN transistors over 0.73-0.98 GHz. The prototype was successfully linearized under modulated signals with up to 20 MHz modulation bandwidth. To further improve the linearizability of the DPAs under wideband and multi-band modulated signals, this thesis investigates major sources of static and dynamic nonlinearity in two-way DPAs both at device and circuit levels and explores circuit techniques to mitigate them. Furthermore, the challenges of applying the Doherty technique for concurrent transmission of multiple modulated signals are tackled. The most significant contribution of this thesis is to develop a novel waveform engineering approach to designing ultrawideband DPAs. This approach completely reformulates the DPA's output combiner conditions in order to accommodate complex-valued load modulation. Moreover, it relaxes the harmonic termination requirements of the DPAs to further enlarge the Doherty design space, thereby enhancing the bandwidth. A 50-W waveform-engineered two-way DPA prototype was designed for 1.5-2.5 GHz range and was successfully linearized under intra- and inter-band carrier-aggregated signals with up to 600 MHz carrier spacing. Lastly, an input matching network design methodology is proposed for broadband DPAs. This methodology uses the novel concept of ``current contours'' to minimize the bandwidth, efficiency and linearity degradation of DPAs caused by device input non-idealities