124 research outputs found

    ワイヤレス通信のための先進的な信号処理技術を用いた非線形補償法の研究

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    The inherit nonlinearity in analogue front-ends of transmitters and receivers have had primary impact on the overall performance of the wireless communication systems, as it gives arise of substantial distortion when transmitting and processing signals with such circuits. Therefore, the nonlinear compensation (linearization) techniques become essential to suppress the distortion to an acceptable extent in order to ensure sufficient low bit error rate. Furthermore, the increasing demands on higher data rate and ubiquitous interoperability between various multi-coverage protocols are two of the most important features of the contemporary communication system. The former demand pushes the communication system to use wider bandwidth and the latter one brings up severe coexistence problems. Having fully considered the problems raised above, the work in this Ph.D. thesis carries out extensive researches on the nonlinear compensations utilizing advanced digital signal processing techniques. The motivation behind this is to push more processing tasks to the digital domain, as it can potentially cut down the bill of materials (BOM) costs paid for the off-chip devices and reduce practical implementation difficulties. The work here is carried out using three approaches: numerical analysis & computer simulations; experimental tests using commercial instruments; actual implementation with FPGA. The primary contributions for this thesis are summarized as the following three points: 1) An adaptive digital predistortion (DPD) with fast convergence rate and low complexity for multi-carrier GSM system is presented. Albeit a legacy system, the GSM, however, has a very strict requirement on the out-of-band emission, thus it represents a much more difficult hurdle for DPD application. It is successfully implemented in an FPGA without using any other auxiliary processor. A simplified multiplier-free NLMS algorithm, especially suitable for FPGA implementation, for fast adapting the LUT is proposed. Many design methodologies and practical implementation issues are discussed in details. Experimental results have shown that the DPD performed robustly when it is involved in the multichannel transmitter. 2) The next generation system (5G) will unquestionably use wider bandwidth to support higher throughput, which poses stringent needs for using high-speed data converters. Herein the analog-to-digital converter (ADC) tends to be the most expensive single device in the whole transmitter/receiver systems. Therefore, conventional DPD utilizing high-speed ADC becomes unaffordable, especially for small base stations (micro, pico and femto). A digital predistortion technique utilizing spectral extrapolation is proposed in this thesis, wherein with band-limited feedback signal, the requirement on ADC speed can be significantly released. Experimental results have validated the feasibility of the proposed technique for coping with band-limited feedback signal. It has been shown that adequate linearization performance can be achieved even if the acquisition bandwidth is less than the original signal bandwidth. The experimental results obtained by using LTE-Advanced signal of 320 MHz bandwidth are quite satisfactory, and to the authors’ knowledge, this is the first high-performance wideband DPD ever been reported. 3) To address the predicament that mobile operators do not have enough contiguous usable bandwidth, carrier aggregation (CA) technique is developed and imported into 4G LTE-Advanced. This pushes the utilization of concurrent dual-band transmitter/receiver, which reduces the hardware expense by using a single front-end. Compensation techniques for the respective concurrent dual-band transmitter and receiver front-ends are proposed to combat the inter-band modulation distortion, and simultaneously reduce the distortion for the both lower-side band and upper-side band signals.電気通信大学201

    Multi look-up table FPGA implementation of an adaptive digital predistorter for linearizing RF power amplifiers with memory effects

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    This paper presents a hardware implementation of a digital predistorter (DPD) for linearizing RF power amplifiers (PAs) for wideband applications. The proposed predistortion linearizer is based on a nonlinear auto-regressive moving average (NARMA) structure, which can be derived from the NARMA PA behavioral model and then mapped into a set of scalable lookup tables (LUTs). The linearizer takes advantage of its recursive nature to relax the LUT count needed to compensate memory effects in PAs. Experimental support is provided by the implementation of the proposed NARMA DPD in a field-programmable gate-array device to linearize a 170-W peak power PA, validating the recursive DPD NARMA structure for W-CDMA signals and flexible transmission bandwidth scenarios. To the best of the authors’ knowledge, it is the first time that a recursive structure is experimentally validated for DPD purposes. In addition to the results on PA efficiency and linearity, this paper addresses many practical implementation issues related to the use of FPGA in DPD applications, giving an original insight on actual prototyping scenarios. Finally, this study discusses the possibility of further enhancing the overall efficiency by degrading the PA operation mode, provided that DPD may be unavoidable due to the impact of memory effects.Peer Reviewe

    An Octave-Range, Watt-Level, Fully-Integrated CMOS Switching Power Mixer Array for Linearization and Back-Off-Efficiency Improvement

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    The power mixer array is presented as a novel power generation approach for non-constant envelope signals. It comprises several power mixer units that are dynamically turned on and off to improve the linearity and back-off efficiency. At the circuit level, the power mixer unit can operate as a switching amplifier to achieve high peak power efficiency. Additional circuit level linearization and back-off efficiency improvement techniques are also proposed. To demonstrate the feasibility of this idea, a fully-integrated octave-range CMOS power mixer array is implemented in a 130 nm CMOS process. It is operational between 1.2 GHz and 2.4 GHz and can generate an output power of +31.3 dBm into an external 50 Ω load with a PAE of 42% and a gain compression of only 0.4 dB at 1.8 GHz. It achieves a PAE of 25%, at an average output power of +26.4 dBm, and an EVM of 4.6% with a non-constant-envelope 16 QAM signal. It can also produce arbitrary signal levels down to -70 dBm of output power with the 16 QAM-modulated signal without any RF gain control circuit

    TRANSCEIVER PLATFORM FOR COMMERCIAL LTE POWER AMPLIFIERS MODELING AND LINEARIZATION (PLATAFORMA DE MODELADO Y LINEALIZACIÓN DE AMPLIFICADORES COMERCIALES CON TRANSCEPTOR RF PARA LTE)

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    Abstract In this work, a linearization scheme for QPSK and 64-QAM type digital modulation developed in an RF transceiver is presented. The modeling stage is based on a polynomial memory model with flexible memory depth and non-linearity order. In addition, an indirect learning approach (ILA) scheme is adapted for spectral correction. In this case, a sweep is performed to characterize the commercial RF power amplifier of the AD9316. Experimental results are presented to validate the QPSK with a carrier frequency of 2.4 GHz with a bandwidth of 18 MHz, and for a 64-QAM multiplexed by LTE with a bandwidth of 2.7 MHz. The improvement of the spectral growth of 8 dB for a QPSK signal of 18 MHz and it is demonstrated that it worsens by 2 dB due to the non-linear behavior of the amplifier for an LTE signal with a bandwidth of 2.7 MHz. The developed system is applicable for base stations of femtocells, picocells, and microcells. It represents the starting point of a digital predistortion (DPD) system for medium and high-power RF-PA. Keywords: 64-QAM, LTE, QPSK, RF-PAs, transceiver. Resumen En este trabajo se presenta un esquema de linealización para modulación digital tipo QPSK y 64-QAM desarrollado en un transceptor de RF. La etapa de modelado se basa en un modelo polinomial de memoria con profundidad de memoria flexible y orden de no linealidad, además se adapta un esquema de enfoque de aprendizaje indirecto (ILA) para la corrección espectral. En este caso, se realiza un barrido para caracterizar el amplificador de potencia de RF comercial del AD9316. Se presentan resultados experimentales para validar el QPSK con una frecuencia portadora de 2.4 GHz con un ancho de banda de 18 MHz, y para un 64-QAM multiplexado por LTE con un ancho de banda de 2.7 MHz. Se logra la mejora del recrecimiento espectral de 8 dB para una señal QPSK de 18 MHz y se demuestra como empeora en 2 dB debido al comportamiento no lineal del amplificador para una señal LTE con un ancho de banda de 2.7 MHz. El sistema desarrollado es aplicable para estaciones base de femtocélulas, picocélulas y microcélulas y representa el punto de partida de un sistema de predistorsión digital (DPD) para RF-PA de potencia media y alta. Palabras Clave: 64-QAM, LTE, QPSK, RF-PAs, transceptor

    Investigation of Time Domain Modulation and Switching-Mode Power Amplifiers Suitable for Digitally-Assisted Transmitters

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    Innovation in wireless communication has resulted in accelerating demand for smartphones using multiple communications protocols such as WiFi, Bluetooth and the many cellular standards deployed around the world. The variety of frequency, bandwidth and power requirements associated with each standard typically calls for the implementation of separate radio frequency (RF) front end hardware for each standard. This is a less-than-ideal solution in terms of cost and device area. Software-defined radio (SDR) promises to solve this problem by allowing the RF hardware to be digitally reconfigurable to adapt to any wireless standard. The application of machine learning and cognition algorithms to SDR will enable cognitive radios and cognitive wireless networks, which will be able to intelligently adapt to user needs and surrounding radio spectrum conditions. The challenge of fully reconfigurable transceivers is in implementing digitally-controlled RF circuits which have comparable performance to their fixed-frequency counterparts. Switching-mode power amplifiers (SMPA) are likely to be an important part of fully reconfigurable transmitters since their switching operation provides inherent compatibility with digital circuits, with the added benefit of very high efficiency. As a step to understanding the RF requirements of high efficiency and switching PAs, an inverse class F PA in push-pull configuration is implemented. This configuration is chosen for its similarity to the current mode class D (CMCD) topology. The fabricated PA achieves a peak drain efficiency of over 75% with 42.7 dBm (18.6 W) output power at 2.46 GHz. Since SMPAs cannot directly provide the linearity required by current and future wireless communications standards, amplitude information must be encoded into the RF signal in a different way. Given the superior time resolution of digital integrated circuit (IC) technology, a logical solution is to encode this information into the timing of the signal. The two most common techniques for doing so are pulse width modulation and delta-sigma modulation. However, the design of delta-sigma modulators requires simulation as part of the design process due to the lack of closed-form relationships between modulator parameters (such as resolution and oversampling) and performance figures (such as coding efficiency and signal quality). In particular, the coding efficiency is often ignored although it is an important part of ensuring transmitter efficiency with respect to the desired signal. A study of these relationships is carried out to observe the tradeoffs between them. It is found that increasing the speed or complexity of a DS modulated system does not necessarily translate to performance benefits as one might expect. These observations can have a strong impact on design choices at the system level

    Joint Satellite-Transmitter and Ground-Receiver Digital Pre-Distortion for Active Phased Arrays in LEO Satellite Communications

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    A novel joint satellite-transmitter and ground-receiver (JSG) digital pre-distortion (DPD) (JSG-DPD) technique is proposed to improve the linearity and power efficiency of the space-borne active phased arrays (APAs) in low Earth orbit (LEO) satellite communications. Different from the conventional DPD technique that requires a complex RF feedback loop, the DPD coefficients based on a generalized memory polynomial (GMP) model are extracted at the ground-receiver and then transmitted to the digital baseband front-end of the LEO satellite-transmitter via a satellite–ground bi-directional transmission link. The issue of the additive white Gaussian noise (AWGN) of the satellite–ground channel affecting the extraction of DPD coefficients is tackled using a superimposing training sequences (STS) method. The proposed technique has been experimentally verified using a 28 GHz phased array. The performance improvements in terms of error vector amplitude (EVM) and adjacent channel power ratio (ACPR) are 7.5% and 3.6 dB, respectively. Requiring limited space-borne resources, this technique offers a promising solution to achieve APA DPD for LEO satellite communications

    Q-enhancement in RF CMOS Filters:Case Study: Direct Conversion Transmitters for UMTS

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    Adaptive optical feedforward linearization of optical transceiver for radio over fiber communication link

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    With the tremendous growth in numbers of mobile data subscribers and explosive demand for mobile data, the current wireless access network need to be augmented in order to keep up with the data speed promised by the future generation mobile network standards. Radio over fiber technology (RoF) is a cost effective solution because of its ability to support numerous numbers of simple structured base stations by consolidating the signal processing functions at the central station. RoF systems are analog systems where noise figure and spurious free dynamic range (SFDR) are important parameters in an RoF link. The nonlinearity of a laser transmitter is a major limiting factor to the performance of an RoF link, as it generates spurious spectral components, leading to intermodulation distortions (IMD), which limit the achievable SFDR of the analog RF wave transmissions. The device nonlinearity can be mitigated through various linearization schemes. The feedforward linearization technique offers a number of advantages compared to other techniques, as it offers good suppression of distortion products over a large bandwidth and supports high operating frequencies. On the other hand, feedforward linearization is a relatively sensitive scheme, where its performance is highly influenced by changing operating conditions such as laser aging, temperature effect, and input signal variations. Therefore, for practical implementations the feedforward system has to be real-time adaptive. This thesis aims to develop an adaptive optical feedforward linearization system for radio over fiber links. Mathematical analyses and computer simulations are performed to determine the most efficient algorithm for the adaptive controller for laser transmitter feedforward linearization system. Experimental setup and practical measurement are performed for an adaptive feedforward linearized laser transmitter and its performance is optimized. The adaptive optical feedforward linearization system has been modeled and simulated in MATLAB Simulink. The performances of two adaptive algorithms, which are related to the gradient signal method, such as least mean square (LMS) and recursive least square (RLS) have been compared. The LMS algorithm has been selected because of its robustness and simplicity. Finally, the adaptive optical feedforward linearization system has been set up with digital signal processor (DSP) as the control device, and practical measurement has been performed. The system has achieved a suppression of 14 dB in the third order IMD products over a bandwidth of 30 MHz, in a two-tone measurement at 1.7 GHz
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