1,570 research outputs found

    Novel active function blocks and their applications in frequency filters and quadrature oscillators

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    KmitočtovĂ© filtry a sinusoidnĂ­ oscilĂĄtory jsou lineĂĄrnĂ­ elektronickĂ© obvody, kterĂ© jsou pouĆŸĂ­vĂĄny v ĆĄirokĂ© oblasti elektroniky a jsou zĂĄkladnĂ­mi stavebnĂ­mi bloky v analogovĂ©m zpracovĂĄnĂ­ signĂĄlu. V poslednĂ­ dekĂĄdě pro tento Ășčel bylo prezentovĂĄno velkĂ© mnoĆŸstvĂ­ stavebnĂ­ch funkčnĂ­ch blokĆŻ. V letech 2000 a 2006 na Ústavu telekomunikacĂ­, VUT v Brně byly definovĂĄny univerzĂĄlnĂ­ proudovĂœ konvejor (UCC) a univerzĂĄlnĂ­ napět'ovĂœ konvejor (UVC) a vyrobeny ve spoluprĂĄci s firmou AMI Semiconductor Czech, Ltd. OvĆĄem, stĂĄle existuje poĆŸadavek na vĂœvoj novĂœch aktivnĂ­ch prvkĆŻ, kterĂ© nabĂ­zejĂ­ novĂ© vĂœhody. HlavnĂ­ pƙínos prĂĄce proto spočívĂĄ v definici dalĆĄĂ­ch pĆŻvodnĂ­ch aktivnĂ­ch stavebnĂ­ch blokĆŻ jako jsou differential-input buffered and transconductance amplifier (DBTA), current follower transconductance amplifier (CFTA), z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), generalized current follower differential input transconductance amplifier (GCFDITA), voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), a minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). PomocĂ­ navrĆŸenĂœch aktivnĂ­ch stavebnĂ­ch blokĆŻ byly prezentovĂĄny pĆŻvodnĂ­ zapojenĂ­ fĂĄzovacĂ­ch člĂĄnkĆŻ prvnĂ­ho ƙádu, univerzĂĄlnĂ­ filtry druhĂ©ho ƙádu, ekvivalenty obvodu typu KHN, inverznĂ­ filtry, aktivnĂ­ simulĂĄtory uzemněnĂ©ho induktoru a kvadraturnĂ­ sinusoidnĂ­ oscilĂĄtory pracujĂ­cĂ­ v proudovĂ©m, napět'ovĂ©m a smĂ­ĆĄenĂ©m mĂłdu. ChovĂĄnĂ­ navrĆŸenĂœch obvodĆŻ byla ověƙena simulacĂ­ v prostƙedĂ­ SPICE a ve vybranĂœch pƙípadech experimentĂĄlnĂ­m měƙenĂ­m.Frequency filters and sinusoidal oscillators are linear electric circuits that are used in wide area of electronics and also are the basic building blocks in analogue signal processing. In the last decade, huge number of active building blocks (ABBs) were presented for this purpose. In 2000 and 2006, the universal current conveyor (UCC) and the universal voltage conveyor (UVC), respectively, were designed at the Department of Telecommunication, BUT, Brno, and produced in cooperation with AMI Semiconductor Czech, Ltd. There is still the need to develop new active elements that offer new advantages. The main contribution of this thesis is, therefore, the definition of other novel ABBs such as the differential-input buffered and transconductance amplifier (DBTA), the current follower transconductance amplifier (CFTA), the z-copy current-controlled current inverting transconductance amplifier (ZC-CCCITA), the generalized current follower differential input transconductance amplifier (GCFDITA), the voltage gain-controlled modified current-feedback operational amplifier (VGC-MCFOA), and the minus-type current-controlled third-generation voltage conveyor (CC-VCIII-). Using the proposed ABBs, novel structures of first-order all-pass filters, second-order universal filters, KHN-equivalent circuits, inverse filters, active grounded inductance simulators, and quadrature sinusoidal oscillators working in the current-, voltage-, or mixed-mode are presented. The behavior of the proposed circuits has been verified by SPICE simulations and in selected cases also by experimental measurements.

    Design of a 4.2-5.4 GHz differential LC VCO using 0.35 mu m SiGeBiCMOS technology for IEEE 802.11a applications

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    In this paper, a 4.2-5.4 GHz, -Gm LC voltage controlled oscillator (VCO) for IEEE 802.11a standard is presented. The circuit is designed with AMS 0.35 mu m SiGe BiCMOS process that includes high-speed SiGe Heterojunction Bipolar Transistors (HBTs). According to post-layout simulation results, phase noise is -110.7 dBc/Hz at 1 MHz offset from 5.4 GHz carrier frequency and -113.4 dBc/Hz from 4.2 GHz carrier frequency. A linear, 1200 MHz tuning range is obtained from the simulations, utilizing accumulation-mode varactors. Phase noise was also found to be relatively low because of taking advantage of differential tuning concept. Output power of the fundamental frequency changes between 4.8 dBm and 5.5 dBm depending on the tuning voltage. Based on the simulation results, the circuit draws 2 mA without buffers and 14.5 mA from 2.5 V supply including buffer circuits leading to a total power dissipation of 36.25 mW. The circuit layout occupies an area of 0.6 mm(2) on Si substrate, including DC and RF pads

    Microwave CMOS VCOs and Front-Ends - using integrated passives on-chip and on-carrier

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    The increasing demand for high data rates in wireless communication systems is increasing the requirements on the transceiver front-ends, as they are pushed to utilize more and wider bands at higher frequencies. The work in this thesis is focused on receiver front-ends composed of Low Noise Amplifiers (LNAs), Mixers, and Voltage Controlled Oscillators (VCOs) operating at microwave frequencies. Traditionally, microwave electronics has used exclusive and more expensive semiconductor technologies (III-V materials). However, the rapid development of consumer electronics (e.g. video game consoles) the last decade has pushed the silicon CMOS IC technology towards even smaller feature sizes. This has resulted in high speed transistors (high fT and fmax) with low noise figures. However, as the breakdown voltages have decreased, a lower supply voltage must be used, which has had a negative impact on linearity and dynamic range. Nonetheless, todays downscaled CMOS technology is a feasible alternative for many microwave and even millimeter wave applications. The low quality factor (Q) of passive components on-chip usually limits the high frequency performance. For inductors realized in a standard CMOS process the substrate coupling results in a degraded Q. The quality factor can, however, be improved by moving the passive components off-chip and integrating them on a low loss carrier. This thesis therefore features microwave front-end and VCO designs in CMOS, where some designs have been flip-chip mounted on carriers featuring high Q inductors and low loss baluns. The thesis starts with an introduction to wireless communication, receiver architectures, front-end receiver blocks, and low loss carrier technology, followed by the included papers. The six included papers show the capability of CMOS and carrier technology at microwave frequencies: Papers II, III, and VI demonstrate fully integrated CMOS circuit designs. An LC-VCO using an accumulation mode varactor is presented in Paper II, a QVCO using 4-bit switched tuning is shown in Paper III, and a quadrature receiver front-end (including QVCO) is demonstrated in paper VI. Papers I and IV demonstrate receiver front-ends using low loss baluns on carrier for the LO and RF signals. Paper IV also includes a front-end using single-ended RF input which is converted to differential form in a novel merged LNA and balun. A VCO demonstrating the benefits of a high Q inductor on carrier is presented in Paper V

    Non-gyrator type active inductors

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    Modern CMOS radio frequency (RF) Receivers have enabled efficient and increasing applications. The main requirement is to have system in a single chip, in order to minimize area and cost. For the purpose it is required the development of inductorless circuits for the key blocks of an RF receiver. Examples of this key blocks are RC oscillators, RF band pass filters, and Low Noise Amplifiers. The present dissertation presents an inductorless wideband MOSFET-only RF Non-Gyrator Type of Active Inductors with low area, low cost, and very low power, capable of covering the whole WMTS, and ISM, band and intended for biomedical applications. The proposed circuit is based on a floating capacitor connected between two controlled current sources. The first current source, which is controlled by the circuit input voltage, has two objectives: supply current to the capacitor (2) and develop a voltage with 90Âș degrees in regard to the first current. The capacitor controls the second current source. The addition of one transistor compensates the capacitive parcel of the input current, in order to become purely inductive. This model, based on Active Inductors (AI) takes advantage of the 130 MOS technology to optimize the control of the quality factor. In this sense, the proposed AIs can behave as a parallel RLC Oscillator, and examples of realizations for 662 MHz to 4.1 GHz range are given. A 1.2 V power source, supply the circuit with 56.4 W at the maximum oscillation frequency. With this results, it is possible to confirm the proposed objectives, in order to have a functional Active Inductor as a key block in RF transceivers

    Receiver Front-Ends in CMOS with Ultra-Low Power Consumption

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    Historically, research on radio communication has focused on improving range and data rate. In the last decade, however, there has been an increasing demand for low power and low cost radios that can provide connectivity with small devices around us. They should be able to offer basic connectivity with a power consumption low enough to function extended periods of time on a single battery charge, or even energy scavenged from the surroundings. This work is focused on the design of ultra-low power receiver front-ends intended for a receiver operating in the 2.4GHz ISM band, having an active power consumption of 1mW and chip area of 1mmÂČ. Low power consumption and small size make it hard to achieve good sensitivity and tolerance to interference. This thesis starts with an introduction to the overall receiver specifications, low power radio and radio standards, front-end and LO generation architectures and building blocks, followed by the four included papers. Paper I demonstrates an inductorless front-end operating at 915MHz, including a frequency divider for quadrature LO generation. An LO generator operating at 2.4GHz is shown in Paper II, enabling a front-end operating above 2GHz. Papers III and IV contain circuits with combined front-end and LO generator operating at or above the full 2.45GHz target frequency. They use VCO and frequency divider topologies that offer efficient operation and low quadrature error. An efficient passive-mixer design with improved suppression of interference, enables an LNA-less design in Paper IV capable of operating without a SAW-filter

    Low-power CMOS front-ends for wireless personal area networks

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    The potential of implementing subthreshold radio frequency circuits in deep sub-micron CMOS technology was investigated for developing low-power front-ends for wireless personal area network (WPAN) applications. It was found that the higher transconductance to bias current ratio in weak inversion could be exploited in developing low-power wireless front-ends, if circuit techniques are employed to mitigate the higher device noise in subthreshold region. The first fully integrated subthreshold low noise amplifier was demonstrated in the GHz frequency range requiring only 260 ÎŒW of power consumption. Novel subthreshold variable gain stages and down-conversion mixers were developed. A 2.4 GHz receiver, consuming 540 ÎŒW of power, was implemented using a new subthreshold mixer by replacing the conventional active low noise amplifier by a series-resonant passive network that provides both input matching and voltage amplification. The first fully monolithic subthreshold CMOS receiver was also implemented with integrated subthreshold quadrature LO (Local Oscillator) chain for 2.4 GHz WPAN applications. Subthreshold operation, passive voltage amplification, and various low-power circuit techniques such as current reuse, stacking, and differential cross coupling were combined to lower the total power consumption to 2.6 mW. Extremely compact resistive feedback CMOS low noise amplifiers were presented as a cost-effective alternative to narrow band LNAs using high-Q inductors. Techniques to improve linearity and reduce power consumption were presented. The combination of high linearity, low noise figure, high broadband gain, extremely small die area and low power consumption made the proposed LNA architecture a compelling choice for many wireless applications.Ph.D.Committee Chair: Laskar, Joy; Committee Member: Chakraborty, Sudipto; Committee Member: Chang, Jae Joon; Committee Member: Divan, Deepakraj; Committee Member: Kornegay, Kevin; Committee Member: Tentzeris, Emmanoui

    Design And Implementation Of Up-Conversion Mixer And Lc-Quadrature Oscillator For IEEE 802.11a WLAN Transmitter Application Utilizing 0.18 Pm CMOS Technology [TK7871.99.M44 H279 2008 f rb].

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    Perlumbaan implementasi litar terkamil radio, dengan kos yang rendah telah menggalakkan penggunaan teknologi CMOS. The drive for cost reduction has led to the use of CMOS technology for highly integrated radios

    Low-power transceiver design for mobile wireless chemical biological sensors

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    The design of a smart integrated chemical sensor system that will enhance sensor performance and compatibility to Ad hoc network architecture remains a challenge. This work involves the design of a Transceiver for a mobile chemical sensor. The transceiver design integrates all building blocks on-chip, including a low-noise amplifier with an input-matching network, a Voltage Controlled Oscillator with injection locking, Gilbert cell mixers, and a Class E Power amplifier making it as a single-chip transceiver. This proposed low power 2GHz transceiver has been designed in TSMC 0.35~lm CMOS process using Cadence electronic design automation tools. Post layout HSPICE simulation indicates that Design meets the separation of noise levels by 52dB and 42dB in transmitter and receiver respectively with power consumption of 56 mW and 38 mW in transmit and receive mode
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