Active‐matrix organic light‐emitting displays employing two thin‐film‐transistor a‐Si:H pixels on flexible stainless‐steel foil

Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/92136/1/1.2759547.pd

Advanced Integration of Devices Enabled by Laser Crystallization of Silicon

The push for higher levels of performance drives research and innovation in all areas of electronics. Thus far, shrinking circuit sizes and development of new material systems have satisfied this need. Continued scaling and material improvements have become increasingly difficult; simultaneously, more functionality is needed in smaller spaces. Advanced integration techniques provide a solution by engineering together previously incompatible systems. The fabrication of high-performance devices typically requires high temperature processing steps. Since fabrication occurs sequentially, the high temperature prevents the direct integration of two high-performance layers, as completed devices cannot withstand the processing temperatures of subsequent steps. There are significant challenges to integrating process-incompatible systems, and techniques such as wafer bonding, heteroepitaxial growth, and various thin film technologies have shown limited success. In this work, advanced integration is achieved through laser crystallization processes. Unique to laser methods is the ability to locally heat the surface of a material while keeping the underlying substrate at room temperature. This property allows for high performance electronic materials to be integrated with substrates of different functionalities. This thesis focuses on three key components for advanced integration: 1. Laser-crystallized electronic devices, 2. Relevant substrates for integration, and 3. The feasibility of integrating of laser-crystallized devices with low-temperature substrates. Two types of laser-crystallized devices are explored. Thin-film, laser-crystallized silicon transistors are fabricated at low-temperatures and exhibit high mobilities above 400 cm2 2/Vs. Vertical structure diodes built from laser-crystallized silicon outperformed epitaxially-grown diodes of the same geometry. Light emitting diode (LED) arrays are fabricated from compound semiconductor substrates and tested for display applications. These LED arrays are envisioned to sit underneath the laser-crystallized devices, enabling new applications where both high brightness and high performance transistors are needed. Substrates of low-κ dielectric material are also of interest, as they are widely used for their low capacitance properties. Preliminary results suggest that laser crystallization of silicon can be successfully performed on a low-κ dielectric. In addition to enabling new device architectures, it is important for laser crystallization methods to leave the underlying layers unaffected. Simulations of the laser irradiation process predict substrate temperatures to reach only 70C even when the surface reaches the melting temperature of silicon (1400C). Integration feasibility is further investigated with measurements on conventional front-end field effect transistors. When comparing properties from wafers with and without laser processing, no changes in transistor characteristics are observed. In all three components of work, proof-of-principle devices and concepts lay out the groundwork for future investigation. The developed technologies have promising applications in both the microelectronics and display industry. In particular, the integration of LEDs and laser-crystallized silicon enables a high-brightness microdisplay platform for head-mounted displays, pico projectors, and head-up displays

On variability and reliability of poly-Si thin-film transistors

In contrast to conventional bulk-silicon technology, polysilicon (poly-Si) thin-film transistors (TFTs) can be implanted in flexible substrate and can have low process temperature. These attributes make poly-Si TFT technology more attractive for new applications, such as flexible displays, biosensors, and smart clothing. However, due to the random nature of grain boundaries (GBs) in poly-Si film and self-heating enhanced negative bias temperature instability (NBTI), the variability and reliability of poly-Si TFTs are the main obstacles that impede the application of poly-Si TFTs in high-performance circuits. The primary focus of this dissertation is to develop new design methodologies and modeling techniques for facilitating new applications of poly-Si TFT technology. In order to do that, a physical model is first presented to characterize the GB-induced transistor threshold voltage (V th)variations considering not only the number but also the position and orientation of each GB in 3-D space. The fast computation time of the proposed model makes it suitable for evaluation of GB-induced transistor Vthvariation in the early design phase. Furthermore, a self-consistent electro-thermal model that considers the effects of device geometry, substrate material, and stress conditions on NBTI is proposed. With the proposed modeling methodology, the significant impacts of device geometry, substrate, and supply voltage on NBTI in poly-Si TFTs are shown. From a circuit design perspective, a voltage programming pixel circuit is developed for active-matrix organic light emitting diode (AMOLED) displays for compensating the shift of Vth and mobility in driver TFTs as well as compensating the supply voltage degradation. In addition, a self-repair design methodology is proposed to compensate the GB-induced variations for liquid crystal displays (LCDs) and AMOLED displays. Based on the simulation results, the proposed circuit can decrease the required supply voltage by 20% without performance and yield degradation. In the final section of this dissertation, an optimization methodology for circuit-level reliability tests is explored. To effectively predict circuit lifetime, accelerated aging (i.e. elevated voltage and temperature) is commonly applied in circuit-level reliability tests, such as constant voltage stress (CVS) and ramp voltage stress (RVS) tests. However, due to the accelerated aging, shifting of dominant degradation mechanism might occur leading to the wrong lifetime prediction. To get around this issue, we proposed a technique to determine the proper stress range for accelerated aging tests

Flash Lamp Annealed LTPS TFTs with ITO Bottom-Gate Structures

As displays continue to increase in resolution and refresh rate, new materials for thin film transistors (TFTs) are required. Low temperature polycrystalline silicon (LTPS) formed by excimer laser annealing (ELA) has been very successful and has been implemented in small displays, but cost and scalability issues prevent it from entering larger display products. Currently LPTS TFTs are top-gate structures due to manufacturing challenges associated with crystallizing thin film silicon when a thermally conductive gate is under portions and insulating glass under others. Bottom-gate devices offer the benefit of higher breakdown voltage, better dielectric-semiconductor interface quality, and direct access to the back-channel region for interface trap passivation. The ability to fabricate bottom-gate devices would allow for different integration and design schemes and is a prerequisite for double gate structures. Flash lamp annealed (FLA) LTPS is an attractive method to expand the size of displays that use high mobility TFTs due to its scalability and parallel production nature. In this work bottom-gate LTPS TFTs were fabricated via FLA with indium tin oxide (ITO), a transparent conductive oxide, used as the gate electrode. A p-channel TFT with 4 µm channel length crystallized with a FLA energy of 4.4 J/cm2 for 250 µs demonstrated a low-field mobility of 190 cm2/(Vs), a subthreshold slope of 325 mV/dec, on/off state ratio of seven orders of magnitude, and a threshold voltage of -5.4 V. A dielectric failure mechanism was identified that compromised the transistor operation under high drain bias and an alternative dopant introduction techniques were proposed to mitigate this issue. An effect due to the transduction of optical energy from the field to thermal energy under the channel via the gate was observed. Details of the FLA crystallization process, device fabrication, and electrical characteristics will be presented

Device-circuit interactions and impact on TFT circuit-system design

This paper reviews the importance of device-circuit interactions (DCI) and its consideration when designing thin film transistor circuits and systems. We examine temperature- and process-induced variations and propose a way to evaluate the maximum achievable intrinsic performance of the TFT. This is aimed at determining when DCI becomes crucial for a specific application. Compensation methods are then reviewed to show examples of how DCI is considered in the design of AMOLED displays. Other designs such as analog front-end and image sensors are also discussed, where alternate circuits should be designed to overcome the limitations of the intrinsic device properties

An amorphous oxide semiconductor thin-film transistor route to oxide electronics

Amorphous oxide semiconductor (AOS) thin-film transistors (TFTs) invented only one decade ago are now being commercialized for active-matrix liquid crystal display (AMLCD) backplane applications. They also appear to be well positioned for other flat-panel display applications such as active-matrix organic light-emitting diode (AMOLED) applications, electrophoretic displays, and transparent displays. The objectives of this contribution are to overview AOS materials design; assess indium gallium zinc oxide (IGZO) TFTs for AMLCD and AMOLED applications; identify several technical topics meriting future scrutiny before they can be confidently relied upon as providing a solid scientific foundation for underpinning AOS TFT technology; and briefly speculate on the future of AOS TFTs for display and non-display applications

금속 산화물 및 이차원 나노 물질 기반의 박막 트랜지스터: 성능 최적화 및 양자점 발광 다이오드에 대한 응용

학위논문(박사) -- 서울대학교대학원 : 공과대학 전기·정보공학부, 2021.8. 곽정훈.박막 트랜지스터를 집적한 전자 디스플레이의 개발은 뛰어난 장점으로 인해 큰 관심을 받아왔다. 지난 수십 년 동안 능동 매트릭스 액정 디스플레이 및 유기 발광 다이오드와 같은 평판 디스플레이에 대한 여러 연구가 보고되었습니다. 이러한 우수한 성과에도 불구하고, p형 산화물/나노 반도체의 개발과 백플레인 박막 트랜지스터로 구동되는 양자점 발광 다이오드의 구동에 대한 연구는 제한적입니다. p형 반도체의 전기적 특성은 이동도가 낮고, 오프 전류가 높으며, 소자의 불안정성이 있기 때문입니다. 이러한 의미에서 우리는 앞서 언급한 응용을 위한 p-형 산화물/나노 물질 기반 박막 트랜지스터와 콜로이드 양자점 발광 다이오드를 연구했습니다. 먼저, 우리는 유연한 전자 장치에 잠재적으로 매력적인 나노 와이어 구조로 형성된 대체 전극으로 전기적 특성을 위해 스프레이 코팅된 단일벽 탄소나노 튜브를 소스 및 드레인 전극으로 사용하는 p 형 주석 산화물 (SnO) 박막 트랜지스터를 구현했습니다. 폴리머 에치 스토퍼 층에 SU-8이 있는 SnO 박막 트랜지스터의 소자 구조는 SnO 채널 층의 열화 없이 원하는 영역에서 단일벽 탄소나노튜브의 선택적 에칭을 가능하게 합니다. 또한 단일벽 탄소나노튜브 전극으로 사용하는 SnO 박막 트랜지스터는 적절한 채널폭과 정규화된 전기적 컨택 특성 (~ 1 kΩ cm), 전계 효과 이동성 (~ 0.69 cm2/Vs), 문턱전압이하 스윙 (~ 0.4 V/dec) 및 전류 온-오프 특성 (Ion/Ioff ~ 3.5×103)을 성공적으로 구현하였습니다. 또한 온도에 따른 전기적 컨택 및 채널 특성은 Ni 전극에 필적하는 적절한 접촉 저항과 함께 무시할 수 있는 수준의 가전자띠 테일 스테이트의 3 x 10-3 eV 활성화 에너지로 SnO 채널 전송을 설명합니다. 둘째, 우리는 먼저 상보형 트랜지스터를 구현하여 p (또는 n 형) MoTe2 박막 트랜지스터에 의해 제어되는 양자점 발광 다이오드 구동을 시연합니다. 이 연구에서는 MoTe2 박막 트랜지스터의 유형 변환을 위해 Poly-L-lysine (PLL)에 의한 분자 도핑을 도입하고, 양자점 발광 다이오드 성능 향상을 위해 표면 리간드 변형을 활용합니다. 이와 관련하여 PLL 처리는 전기적 특성의 저하없이 MoTe2 박막 트랜지스터의 뛰어난 유형 변환을 달성하여, 안정적인 p (또는 n 형) 유형 장치를 확보하여 보완 회로의 가용성을 보장합니다. 또한, 옥틸 아민으로 리간드 치환된 양자점은 양자점 발광 다이오드에서 균형 잡힌 전자/정공 주입을 생성하여, 전류 효율 (ηA = 13.9 cd/A)이 개선되고 수명이 더 길어집니다 (L0 = 3000 cd/m2에서 T50 = 66 h). 결과적으로 MoTe2 박막 트랜지스터는 적절한 스위칭 특성을 가진 디스플레이 백플레인 트랜지스터, 광 전류 생성에 대한 내성 및 작동 안정성을 포함하여 양자점 발광 다이오드를 구동하는 능력을 보여줍니다. 이 논문에서 우리는 유망한 응용을 위한 산화물/나노 물질 기반 박막 트랜지스터와 리간드 치환 기술이 적용된 후면 발광 적색 양자점 발광 다이오드에 대해 논의합니다. 백플레인 박막 트랜지스로 p형 SnO와 MoTe2를 사용하고, 새로운 디스플레이 장치로 CdSe 양자점 발광 다이오드를 사용한 우리의 연구 성과는 융합 연구를 위한 구상 분야에서 잠재적으로 사용될 수 있습니다.The development of electronic displays integrated with Thin Film Transistors (TFTs) has been great interests due to their superb merits. For the past decades, several studies have been reported for the flat-panel displays (FPDs) such as active-matrix liquid crystal display (LCD) and organic light-emitting diode (OLED). Despite of these excellent achievements, progress of p-type oxide/nano semiconductors and operation of quantum dot light-emitting diode (QLED) driven by backplane TFTs are limited. This is because the electrical characteristics of p-type semiconductor have low mobility, high off current, and device instability. In this sense, we investigated p-type oxide/nano material-based TFTs and colloidal quantum dot light-emitting diodes (QLEDs) for the afore-mentioned application. First, we implemented p-type tin oxide (SnO) TFTs with spray-coated single-wall carbon nanotube (SWNTs) as source and drain electrodes for their electrical characteristics as alternative electrodes formed of nanowire structures, which are potentially attractive for flexible electronics. The device architecture of SnO TFTs with a polymer etch stop layer (SU-8) enables the selective etching of SWNTs in a desired region without the detrimental effects of SnO channel layers. In addition, SnO TFTs with SWNT electrodes as substitutes successfully demonstrate decent width normalized electrical contact properties (~1 kΩ cm), field effect mobility (~0.69 cm2/Vs), sub-threshold slope (~0.4 V/dec), and current on-off ratio (Ion/Ioff ~ 3.5×103). Furthermore, temperature-dependent electrical contact and channel properties elucidate SnO channel transports with an activation energy of 3×10-3 eV, interpreted as a negligible level of valence-band tail states, together with decent contact resistance comparable to that of Ni electrodes. Second, we firstly demonstrated the QLEDs operation modulated by p (or n-type) MoTe2 TFTs with the realization of complementary type transistor. In this study, molecular doping by Poly-L-lysine (PLL) as an electron dopant is adopted for a type conversion of MoTe2 TFTs, and surface ligand modification is utilized for the improvement of QLED performance. In this regard, the PLL treatment achieves the outstanding type conversion of MoTe2 TFTs without any degradation of electrical properties, leading to securing reliable p (or n-type) devices, thus, availability of complementary circuits. Furthermore, ligand modified QDs capped with octylamine result in balanced electron/hole injection in QLEDs, yielding improved current efficiency (ηA =13.9 cd/A) and longer lifetimes (T50 = 66 h at L0 = 3000 cd/m2). As a result, MoTe2 TFTs demonstrate their capabilities to drive the QLEDs for the envisioned application including display backplane transistor with decent switching properties, immunity for generation of photocurrent, and operation stability. In this thesis, we discuss the oxide/nano material based TFTs and ligand modified bottom emitting red QLEDs for many promising applications. Our research achievements using p-type SnO and MoTe2 as backplane TFTs, and CdSe QLED as novel display device can be used in potentially envision fields for the convergence research.Chapter 1 1 1.1 An Overview of Thin Film Transistors 1 1.2 An Overview of Quantum Dot Light-Emitting Diodes 8 1.3 Outline of Thesis 13 Chapter 2 15 2.1 Materials 15 2.1.1 Synthesis of ZnO Nanoparticles 15 2.1.2 Synthesis of Red Light-Emitting CdSe/Cd1-xZnxS Quantumd Dots 15 2.2 Device Characterization of Thin Film Transistors 17 2.2.1 Characterization for Thin Film Transistor 17 2.2.2 Characterization of Light Response 18 2.3 Device Characterization of Quantum Dot Light-Emitting Diodes 18 2.3.1 Current-voltage-luminance Measurement of QLEDs 18 2.3.2 Efficiency Calculation Methods 21 2.3.3 Other Characterization Methods 22 Chapter 3 24 3.1 Devic Fabrication of SnO TFTs with Spray-Coated Single Walled Carbon Nanotubes as S/D Electrodes 26 3.2 Electrical Performance of SnO TFTs 30 3.3 Contact Resistance of Spray-coated SWNTs as S/D Electrodes 33 3.4 Summary 40 Chapter 4 41 4.1 Description of QLED display driven by MoTe2 TFTs 45 4.2 Ligand Modification of Red CdSe/Cd1-xZnxS Quantum Dots 49 4.3 Type Conversion of MoTe2 TFTs via Electron-Donated Charge Enhancer 54 4.4 Light-Insensitive Behaviors on Photocurrent Generation in MoTe2 TFTs 61 4.5 Operation of QLEDs Driven by Channel-type Controlled MoTe2 TFTs 66 4.6 Summary 70 Chapter 5 71 Bibilography 73 한글 초록 81박

On the Reversible Effects of Bias-Stress Applied to Amorphous Indium-Gallium-Zinc-Oxide Thin Film Transistors

The role of amorphous IGZO (Indium Gallium Zinc Oxide) in Thin Film Transistors (TFT) has found its application in emerging display technologies such as active matrix liquid crystal display (LCD) and active matrix organic light-emitting diode (AMOLED) due to factors such as high mobility 10-20 cm2/(V.s), low subthreshold swing (~120mV/dec), overall material stability and ease of fabrication. However, prolonged application of gate bias on the TFT results in deterioration of I-V characteristics such as sub-threshold distortion and a distinct shift in threshold voltage. Both positive-bias and negative-bias affects have been investigated. In most cases positive-stress was found to have negligible influence on device characteristics, however a stress induced trap state was evident in certain cases. Negative stress demonstrated a pronounced influence by donor like interface traps, with significant transfer characteristics shift that was reversible over a period of time at room temperature. It was also found that the reversible mechanism to pre-stress conditions was accelerated when samples were subjected to cryogenic temperature (77 K). To improve device performance BG devices were subjected to extended anneals and encapsulated with ALD alumina. These devices were found to have excellent resistance to bias stress. Double gate devices that were subjected to extended anneals and alumina capping revealed similar results with better electrostatics compared to BG devices. The cause and effect of bias stress and its reversible mechanisms on IGZO TFTs has been studied and explained with supporting models

Wide Bandwidth - High Accuracy Control Loops in the presence of Slow Varying Signals and Applications in Active Matrix Organic Light Emitting Displays and Sensor Arrays

This dissertation deals with the problems of modern active matrix organic light-emitting diode AMOLED display back-plane drivers and sensor arrays. The research described here, aims to classify recently utilized compensation techniques into distinct groups and further pinpoint their advantages and shortcomings. Additionally, a way of describing the loops as mathematical constructs is utilized to derive new circuits from the analog design perspective. A novel principle on display driving is derived by observing those mathematical control loop models and it is analyzed and evaluated as a novel way of pixel driving. Specifically, a new feedback current programming architecture and method is described and validated through experiments, which is compatible with AMOLED displays having the two transistor one capacitor (2T1C) pixel structure. The new pixel programming approach is compatible with all TFT technologies and can compensate for non-uniformities in both threshold voltage and carrier mobility of the pixel OLED drive TFT. Data gathered show that a pixel drive current of 20 nA can be programmed in less than 10usec. This new approach can be implemented within an AMOLED external or integrated display data driver. The method to achieve robustness in the operation of the loop is also presented here, observed through a series of measurements. All the peripheral blocks implementing the design are presented and analyzed through simulations and verified experimentally. Sources of noise are identified and eliminated, while new techniques for better isolation from digital noise are described and tested on a newly fabricated driver. Multiple versions of the new proposed circuit are outlined, simulated, fabricated and measured to evaluate their performance.A novel active matrix array approach suitable for a compact multi-channel gas sensor platform is also described. The proposed active matrix sensor array utilizes an array of P-i-N diodes each connected in series with an Inter-Digitated Electrode (IDE). The functionality of 8x8 and 16x16 sensor arrays measured through external current feedback loops is also presented for the 8x8 arrays and the detection of ammonia (NH3) and chlorine (Cl2) vapor sources is demonstrated

Thin‐Film Transistors for Large Area Opto/Electronics

The present work addresses several issues in the field of organic and transparent electronics. One of them is the prevailing high power consumption in state-of-the-art organic field-effect transistors (OFETs). A possible solution could be the implementation of complementary, rather than unipolar logic, but this development is currently inhibited by a distinct lack of high performance electron transporting (n-channel) OFETs. Here, the issue is addressed by investigating a series of solution processable n-channel fullerene molecules in combination with optimized transistor architectures. Furthermore, the trend towards complementary circuit design could be facilitated by employing ambipolar organic semiconductors, such as squaraine molecules or polymer/fullerene blends. These materials can fill the role of p- or n-channel semiconductors and enable the facile implementation of power saving complementary-like logic, eliminating the cost-intensive patterned deposition of discrete p-and n-channel transistors. Alternatively, a patterning method for organic materials adapted from standard photolithography is discussed. Furthermore, ambipolar FETs are found to be capable of light sensing at wavelength of 400-1000 nm. Hence their use in low-cost, organic based optical sensor arrays can be envisioned. Another strategy to reduce the power consumption and operating voltages of OFETs is the use of ultra-thin, self-assembled molecular gate dielectrics, such as alkyl-phosphonic acid molecules. Based on this approach solution processed n- and p-channel OFETs and a complementary organic inverter circuit are demonstrated, which operate at less than 2 Volts. Finally, transparent oxide semiconductors are investigated for use in thin-film transistors. Titanium dioxide (TiO2) and zinc oxide (ZnO) films are deposited by means of a low-cost large area compatible spray pyrolysis technique. ZnO transistors exhibit high electron mobility of the order of 10 cm2/Vs and stable operation in air at less than 2 Volts. These results are considered significant steps towards the development of organic and transparent large-area optoelectronics