Realization of Ternary Reversible Circuits Using Improved Gate Library

AbstractTernary logic has some distinct advantage over binary logic. In this paper we propose a synthesis approach for ternary reversible circuits using ternary reversible gates. Our method takes a boolean function as input. The input is provided as .pla file. The .pla file is first converted into ternary logic function, which can be represented as permutation. The gate library used for synthesis is Ternary Not, Ternary Toffoli and Ternary Toffoli+ (NT ,TT ,TT +). The proposed constructive method, generates 3-cycles from the permutation, and then each 3-cycle is mapped to (NT ,TT ,TT +) gate library. Experimental results show that the method generates lesser number of gates for some circuits compared to previously reported works

Building Qutrit Diagonal Gates from Phase Gadgets

Phase gadgets have proved to be an indispensable tool for reasoning about ZX-diagrams, being used in optimisation and simulation of quantum circuits and the theory of measurement-based quantum computation. In this paper we study phase gadgets for qutrits. We present the flexsymmetric variant of the original qutrit ZX-calculus, which allows for rewriting that is closer in spirit to the original (qubit) ZX-calculus. In this calculus phase gadgets look as you would expect, but there are non-trivial differences in their properties. We devise new qutrit-specific tricks to extend the graphical Fourier theory of qubits, resulting in a translation between the 'additive' phase gadgets and a 'multiplicative' counterpart we dub phase multipliers. This enables us to generalise the qubit notion of multiple-control to qutrits in two ways. The first type is controlling on a single tritstring, while the second type applies the gate a number of times equal to the tritwise multiplication modulo 3 of the control qutrits.We show how both types of control can be implemented for any qutrit Z or X phase gate, ancilla-free, and using only Clifford and phase gates. The first requires a polynomial number of gates and exponentially small phases, while the second requires an exponential number of gates, but constant sized phases. This is interesting, because such a construction is not possible in the qubit setting. As an application of these results we find a construction for emulating arbitrary qubit diagonal unitaries, and specifically find an ancilla-free emulation for the qubit CCZ gate that only requires three single-qutrit non-Clifford gates, provably lower than the four T gates needed for qubits with ancilla.Comment: In Proceedings QPL 2022, arXiv:2311.0837

Deterministic and Probabilistic Test Generation for Binary and Ternary Quantum Circuits

It is believed that quantum computing will begin to have an impact around year 2010. Much work is done on physical realization and synthesis of quantum circuits, but nothing so far on the problem of generating tests and localization of faults for such circuits. Even fault models for quantum circuits have been not formulated yet. We propose an approach to test generation for a wide category of fault models of single and multiple faults. It uses deterministic and probabilistic tests to detect faults. A Fault Table is created that includes probabilistic information. If possible, deterministic tests are first selected, while covering faults with tests, in order to shorten the total length of the test sequence. The method is applicable to both binary and ternary quantum circuits. The system generates test sequences and adaptive trees for fault localization for small binary and ternary quantum circuits