482 research outputs found
Embeddings in hypercubes
One important aspect of efficient use of a hypercube computer to solve a given problem is the assignment of subtasks to processors in such a way that the communication overhead is low. The subtasks and their inter-communication requirements can be modeled by a graph, and the assignment of subtasks to processors viewed as an embedding of the task graph into the graph of the hypercube network. We survey the known results concerning such embeddings, including expansion/dilation tradeoffs for general graphs, embeddings of meshes and trees, packings of multiple copies of a graph, the complexity of finding good embeddings, and critical graphs which are minimal with respect to some property. In addition, we describe several open problems.Peer Reviewedhttp://deepblue.lib.umich.edu/bitstream/2027.42/27512/1/0000556.pd
Redundancy management for efficient fault recovery in NASA's distributed computing system
The management of redundancy in computer systems was studied and guidelines were provided for the development of NASA's fault-tolerant distributed systems. Fault recovery and reconfiguration mechanisms were examined. A theoretical foundation was laid for redundancy management by efficient reconfiguration methods and algorithmic diversity. Algorithms were developed to optimize the resources for embedding of computational graphs of tasks in the system architecture and reconfiguration of these tasks after a failure has occurred. The computational structure represented by a path and the complete binary tree was considered and the mesh and hypercube architectures were targeted for their embeddings. The innovative concept of Hybrid Algorithm Technique was introduced. This new technique provides a mechanism for obtaining fault tolerance while exhibiting improved performance
Lower bounds for dilation, wirelength, and edge congestion of embedding graphs into hypercubes
Interconnection networks provide an effective mechanism for exchanging data
between processors in a parallel computing system. One of the most efficient
interconnection networks is the hypercube due to its structural regularity,
potential for parallel computation of various algorithms, and the high degree
of fault tolerance. Thus it becomes the first choice of topological structure
of parallel processing and computing systems. In this paper, lower bounds for
the dilation, wirelength, and edge congestion of an embedding of a graph into a
hypercube are proved. Two of these bounds are expressed in terms of the
bisection width. Applying these results, the dilation and wirelength of
embedding of certain complete multipartite graphs, folded hypercubes, wheels,
and specific Cartesian products are computed
Dissections, orientations, and trees, with applications to optimal mesh encoding and to random sampling
We present a bijection between some quadrangular dissections of an hexagon
and unrooted binary trees, with interesting consequences for enumeration, mesh
compression and graph sampling. Our bijection yields an efficient uniform
random sampler for 3-connected planar graphs, which turns out to be determinant
for the quadratic complexity of the current best known uniform random sampler
for labelled planar graphs [{\bf Fusy, Analysis of Algorithms 2005}]. It also
provides an encoding for the set of -edge 3-connected
planar graphs that matches the entropy bound
bits per edge (bpe). This solves a
theoretical problem recently raised in mesh compression, as these graphs
abstract the combinatorial part of meshes with spherical topology. We also
achieve the {optimal parametric rate} bpe
for graphs of with vertices and faces, matching in
particular the optimal rate for triangulations. Our encoding relies on a linear
time algorithm to compute an orientation associated to the minimal Schnyder
wood of a 3-connected planar map. This algorithm is of independent interest,
and it is for instance a key ingredient in a recent straight line drawing
algorithm for 3-connected planar graphs [\bf Bonichon et al., Graph Drawing
2005]
Fault-tolerance embedding of rings and arrays in star and pancake graphs
The star and pancake graphs are useful interconnection networks for connecting processors in a parallel and distributed computing environment. The star network has been widely studied and is shown to possess attactive features like sublogarithmic diameter, node and edge symmetry and high resilience. The star/pancake interconnection graphs, {dollar}S\sb{n}/P\sb{n}{dollar} of dimension n have n! nodes connected by {dollar}{(n-1).n!\over2}{dollar} edges. Due to their large number of nodes and interconnections, they are prone to failure of one or more nodes/edges; In this thesis, we present methods to embed Hamiltonian paths (H-path) and Hamiltonian cycles (H-cycle) in a star graph {dollar}S\sb{n}{dollar} and pancake graph {dollar}P\sb{n}{dollar} in a faulty environment. Such embeddings are important for solving computational problems, formulated for array and ring topologies, on star and pancake graphs. The models considered include single-processor failure, double-processor failure, and multiple-processor failures. All the models are applied to an H-cycle which is formed by visiting all the ({dollar}{n!\over4!})\ S\sb4/P\sb4{dollar}s in an {dollar}S\sb{n}/P\sb{n}{dollar} in a particular order. Each {dollar}S\sb4/P\sb4{dollar} has an entry node where the cycle/path enters that particular {dollar}S\sb4/P\sb4{dollar} and an exit node where the path leaves it. Distributed algorithms for embedding hamiltonian cycle in the presence of multiple faults, are also presented for both {dollar}S\sb{n}{dollar} and {dollar}P\sb{n}{dollar}
Fault-Tolerant Ring Embeddings in Hypercubes -- A Reconfigurable Approach
We investigate the problem of designing reconfigurable embedding schemes for a fixed hypercube (without redundant processors and links). The fundamental idea for these schemes is to embed a basic network on the hypercube without fully utilizing the nodes on the hypercube. The remaining nodes can be used as spares to reconfigure the embeddings in case of faults. The result of this research shows that by carefully embedding the application graphs, the topological properties of the embedding can be preserved under fault conditions, and reconfiguration can be carried out efficiently.
In this dissertation, we choose the ring as the basic network of interest, and propose several schemes for the design of reconfigurable embeddings with the aim of minimizing reconfiguration cost and performance degradation. The cost is measured by the number of node-state changes or reconfiguration steps needed for processing of the reconfiguration, and the performance degradation is characterized as the dilation of the new embedding after reconfiguration. Compared to the existing schemes, our schemes surpass the existing ones in terms of applicability of schemes and reconfiguration cost needed for the resulting embeddings
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