Multiple Query Optimization on the D-Wave 2X Adiabatic Quantum Computer

The D-Wave adiabatic quantum annealer solves hard combinatorial optimization problems leveraging quantum physics. The newest version features over 1000 qubits and was released in August 2015. We were given access to such a machine, currently hosted at NASA Ames Research Center in California, to explore the potential for hard optimization problems that arise in the context of databases. In this paper, we tackle the problem of multiple query optimization (MQO). We show how an MQO problem instance can be transformed into a mathematical formula that complies with the restrictive input format accepted by the quantum annealer. This formula is translated into weights on and between qubits such that the configuration minimizing the input formula can be found via a process called adiabatic quantum annealing. We analyze the asymptotic growth rate of the number of required qubits in the MQO problem dimensions as the number of qubits is currently the main factor restricting applicability. We experimentally compare the performance of the quantum annealer against other MQO algorithms executed on a traditional computer. While the problem sizes that can be treated are currently limited, we already find a class of problem instances where the quantum annealer is three orders of magnitude faster than other approaches

Hardware Impairments Aware Transceiver Design for Bidirectional Full-Duplex MIMO OFDM Systems

In this paper we address the linear precoding and decoding design problem for a bidirectional orthogonal frequencydivision multiplexing (OFDM) communication system, between two multiple-input multiple-output (MIMO) full-duplex (FD) nodes. The effects of hardware distortion as well as the channel state information error are taken into account. In the first step, we transform the available time-domain characterization of the hardware distortions for FD MIMO transceivers to the frequency domain, via a linear Fourier transformation. As a result, the explicit impact of hardware inaccuracies on the residual selfinterference (RSI) and inter-carrier leakage (ICL) is formulated in relation to the intended transmit/received signals. Afterwards, linear precoding and decoding designs are proposed to enhance the system performance following the minimum-mean-squarederror (MMSE) and sum rate maximization strategies, assuming the availability of perfect or erroneous CSI. The proposed designs are based on the application of alternating optimization over the system parameters, leading to a necessary convergence. Numerical results indicate that the application of a distortionaware design is essential for a system with a high hardware distortion, or for a system with a low thermal noise variance.Comment: Submitted to IEEE for publicatio

On dynamic threshold graphs and related classes

This paper deals with the well known classes of threshold and difference graphs, both characterized by separators, i.e. node weight functions and thresholds. We design an efficient algorithm to find the minimum separator, and we show how to maintain minimum its value when the input (threshold or difference) graph is fully dynamic, i.e. edges/nodes are inserted/removed. Moreover, exploiting the data structure used for maintaining the minimality of the separator, we study the disjoint union and the join of two threshold graphs, showing that the resulting graphs are threshold signed graphs, i.e. a superclass of both threshold and difference graphs. Finally, we consider the complement operation on all the three introduced classes of graphs. All these operations produce in output the modified graph in terms of their separator and require time linear w.r.t. the number of different degrees. We observe that recomputing from scratch the separator would run either in linear (for threshold and difference graphs) or quadratic (for threshold signed graphs) time w.r.t. the number of nodes of the graph

Greedy randomized dispatching heuristics for the single machine scheduling problem with quadratic earliness and tardiness penalties

In this paper, we present greedy randomized dispatching heuristics for the single machine scheduling problem with quadratic earliness and tardiness costs, and no machine idle time. The several heuristic versions differ, on the one hand, on the strategies involved in the construction of the greedy randomized schedules. On the other hand, these versions also differ on whether they employ only a final improvement step, or perform a local search after each greedy randomized construction. The proposed heuristics were compared with existing procedures, as well as with optimum solutions for some instance sizes. The computational results show that the proposed procedures clearly outperform their underlying dispatching heuristic, and the best of these procedures provide results that are quite close to the optimum. The best of the proposed algorithms is the new recommended heuristic for large instances, as well as a suitable alternative to the best existing procedure for the larger of the middle size instances.scheduling, single machine, early/tardy, quadratic penalties, greedy randomized dispatching rules

Coloring with defects

Thesis (M.S.)--Massachusetts Institute of Technology, Dept. of Mathematics, 1995.Includes bibliographical references (leaves 19-21).by C.E. Jesurum.M.S