2,682 research outputs found
Fault Testing for Reversible Circuits
Applications of reversible circuits can be found in the fields of low-power
computation, cryptography, communications, digital signal processing, and the
emerging field of quantum computation. Furthermore, prototype circuits for
low-power applications are already being fabricated in CMOS. Regardless of the
eventual technology adopted, testing is sure to be an important component in
any robust implementation.
We consider the test set generation problem. Reversibility affects the
testing problem in fundamental ways, making it significantly simpler than for
the irreversible case. For example, we show that any test set that detects all
single stuck-at faults in a reversible circuit also detects all multiple
stuck-at faults. We present efficient test set constructions for the standard
stuck-at fault model as well as the usually intractable cell-fault model. We
also give a practical test set generation algorithm, based on an integer linear
programming formulation, that yields test sets approximately half the size of
those produced by conventional ATPG.Comment: 30 pages, 8 figures. to appear in IEEE Trans. on CA
Depth-Optimized Reversible Circuit Synthesis
In this paper, simultaneous reduction of circuit depth and synthesis cost of
reversible circuits in quantum technologies with limited interaction is
addressed. We developed a cycle-based synthesis algorithm which uses negative
controls and limited distance between gate lines. To improve circuit depth, a
new parallel structure is introduced in which before synthesis a set of
disjoint cycles are extracted from the input specification and distributed into
some subsets. The cycles of each subset are synthesized independently on
different sets of ancillae. Accordingly, each disjoint set can be synthesized
by different synthesis methods. Our analysis shows that the best worst-case
synthesis cost of reversible circuits in the linear nearest neighbor
architecture is improved by the proposed approach. Our experimental results
reveal the effectiveness of the proposed approach to reduce cost and circuit
depth for several benchmarks.Comment: 13 pages, 6 figures, 5 tables; Quantum Information Processing (QINP)
journal, 201
Synthesis and Optimization of Reversible Circuits - A Survey
Reversible logic circuits have been historically motivated by theoretical
research in low-power electronics as well as practical improvement of
bit-manipulation transforms in cryptography and computer graphics. Recently,
reversible circuits have attracted interest as components of quantum
algorithms, as well as in photonic and nano-computing technologies where some
switching devices offer no signal gain. Research in generating reversible logic
distinguishes between circuit synthesis, post-synthesis optimization, and
technology mapping. In this survey, we review algorithmic paradigms ---
search-based, cycle-based, transformation-based, and BDD-based --- as well as
specific algorithms for reversible synthesis, both exact and heuristic. We
conclude the survey by outlining key open challenges in synthesis of reversible
and quantum logic, as well as most common misconceptions.Comment: 34 pages, 15 figures, 2 table
Towards optimization of quantum circuits
Any unitary operation in quantum information processing can be implemented
via a sequence of simpler steps - quantum gates. However, actual implementation
of a quantum gate is always imperfect and takes a finite time. Therefore,
seeking for a short sequence of gates - efficient quantum circuit for a given
operation, is an important task. We contribute to this issue by proposing
optimization of the well-known universal procedure proposed by Barenco et.al
[1]. We also created a computer program which realizes both Barenco's
decomposition and the proposed optimization. Furthermore, our optimization can
be applied to any quantum circuit containing generalized Toffoli gates,
including basic quantum gate circuits.Comment: 10 pages, 11 figures, minor changes+typo
Minimization of Quantum Circuits using Quantum Operator Forms
In this paper we present a method for minimizing reversible quantum circuits
using the Quantum Operator Form (QOF); a new representation of quantum circuit
and of quantum-realized reversible circuits based on the CNOT, CV and
CV quantum gates. The proposed form is a quantum extension to the
well known Reed-Muller but unlike the Reed-Muller form, the QOF allows the
usage of different quantum gates. Therefore QOF permits minimization of quantum
circuits by using properties of different gates than only the multi-control
Toffoli gates. We introduce a set of minimization rules and a pseudo-algorithm
that can be used to design circuits with the CNOT, CV and CV quantum
gates. We show how the QOF can be used to minimize reversible quantum circuits
and how the rules allow to obtain exact realizations using the above mentioned
quantum gates.Comment: 11 pages, 14 figures, Proceedings of the ULSI Workshop 2012 (@ISMVL
2012
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