Radiation Effects in Pinned Photodiode CMOS Image Sensors: Pixel Performance Degradation Due to Total Ionizing Dose

Several Pinned Photodiode (PPD) CMOS Image Sensors (CIS) are designed, manufactured, characterized and exposed biased to ionizing radiation up to 10 kGy(SiO2 ). In addition to the usually reported dark current increase and quantum efficiency drop at short wavelengths, several original radiation effects are shown: an increase of the pinning voltage, a decrease of the buried photodiode full well capacity, a large change in charge transfer efficiency, the creation of a large number of Total Ionizing Dose (TID) induced Dark Current Random Telegraph Signal (DC-RTS) centers active in the photodiode (even when the Transfer Gate (TG) is accumulated) and the complete depletion of the Pre-Metal Dielectric (PMD) interface at the highest TID leading to a large dark current and the loss of control of the TG on the dark current. The proposed mechanisms at the origin of these degradations are discussed. It is also demonstrated that biasing (i.e., operating) the PPD CIS during irradiation does not enhance the degradations compared to sensors grounded during irradiation

Advances on CMOS image sensors

This paper offers an introduction to the technological advances of image sensors designed using complementary metal–oxide–semiconductor (CMOS) processes along the last decades. We review some of those technological advances and examine potential disruptive growth directions for CMOS image sensors and proposed ways to achieve them. Those advances include breakthroughs on image quality such as resolution, capture speed, light sensitivity and color detection and advances on the computational imaging. The current trend is to push the innovation efforts even further as the market requires higher resolution, higher speed, lower power consumption and, mainly, lower cost sensors. Although CMOS image sensors are currently used in several different applications from consumer to defense to medical diagnosis, product differentiation is becoming both a requirement and a difficult goal for any image sensor manufacturer. The unique properties of CMOS process allows the integration of several signal processing techniques and are driving the impressive advancement of the computational imaging. With this paper, we offer a very comprehensive review of methods, techniques, designs and fabrication of CMOS image sensors that have impacted or might will impact the images sensor applications and markets

A Review of the Pinned Photodiode for CCD and CMOS Image Sensors

The pinned photodiode is the primary photodetector structure used in most CCD and CMOS image sensors. This paper reviews the development, physics, and technology of the pinned photodiode

Gated lateral silicon p-i-n junction photodiodes

Research in silicon photonics has recently seen a significant push to develop complete silicon-based optical components for optical communications. Silicon has shown its potential to overcome the bandwidth limitations of microprocessor interconnect, whereas, the silicon platform has already displayed the benefits of low manufacturing costs and CMOS compatibility. The work on “gated lateral silicon p-i-n junction photodiodes” has demonstrated the silicon potential, to detect optical radiations, compatibility to standard CMOS process flow and tuneable spectral response. The lateral structure of gated p-i-n junction photodiodes contributes to high responsivity to short wavelength radiations in these single and dual gate devices. The final objective of this work was to develop high responsivity, CMOS-compatible silicon photodiodes, where the spectral response can be modulated. The lateral p-i-n junction architecture led to high responsivity values, whereas, the MOS gate structure became the basis for tuneable spectral response. The MOS gate structure, made the devices appear as a transistor to the surrounding circuitry and the gate structure in dual gate devices can be used to modulate the spectral response of the device. Single gate devices showed higher responsivity values and comparatively high blue and ultraviolet (UV) response as compared to conventional photodiodes. Surface depletion region in these devices is utilized by placing a MOS gate structure and by patterning an integrated metal grating to detect polarized light. Single and dual gate devices with two variations were fabricated to characterise the device response. Novel lateral architecture of p-i-n junction photodiodes provides a surface depletion region. It is generally anticipated that photodetectors with surface depletion region might produce higher noise. In these devices the surface depletion region has a lateral continuation of gate dielectric which acts as a passivation layer and thus considerably reduced the noise. Physical device modelling studies were performed to verify the experimentally obtained results, which are provided in the relevant measurement chapters. In these devices the speed of operation is a compromise over the high responsivity, CMOS compatibility and tuneable spectral response

DESIGN OF A BURST MODE ULTRA HIGH-SPEED LOW-NOISE CMOS IMAGE SENSOR

Ultra-high-speed (UHS) image sensors are of interest for studying fast scientific phenomena and may also be useful in medicine. Several published studies have recently achieved frame rates of up to millions of frames per second (Mfps) using advanced processes and/or customized processes. This thesis presents a burst-mode (108 frames) UHS low-noise CMOS image sensor (CIS) based on charge-sweep transfer gates in an unmodified, standard 180 nm front-side-illuminated CIS process. By optimizing the photodiode geometry, the 52.8 μm pitch pixels with 20x20 μm^2 of active area, achieve a charge-transfer time of less than 10 ns. A proof-of-concept CIS was designed and fabricated. Through characterization, it is shown that the designed CIS has the potential to achieve 20 Mfps with an input-referred noise of 5.1 e− rms

Development of CMOS active pixel sensors

This thesis was submitted for the degree of Doctor of Philosophy and awarded by Brunel University.This thesis describes an investigation into the suitability of complementary metal oxide semiconductor (CMOS) active pixel sensor (APS) devices for scientific imaging applications. CMOS APS offer a number of advantages over the established charge-coupled device (CCD) technology, primarily in the areas of low power consumption, high-speed parallel readout and random (X-Y) addressing, increased system integration and improved radiation hardness. The investigation used a range of newly designed Test Structures in conjunction with a range of custom developed test equipment to characterise device performance. Initial experimental work highlighted the significant non-linearity in the charge conversion gain (responsivity) and found the read noise to be limited by the kTC component due to resetting of the pixel capacitance. The major experimental study investigated the contribution to dark signal due to hot-carrier injection effects from the in-pixel transistors during read-out and highlighted the importance of the contribution at low signal levels. The quantum efficiency (QE) and cross-talk were also investigated and found to be limited by the pixel fill factor and shallow depletion depth of the photodiode. The work has highlighted the need to design devices to explore the effects of individual components rather than stand-alone imaging devices and indicated further developments are required for APS technology to compete with the CCD for high-end scientific imaging applications. The main areas requiring development are in achieving backside illuminated, deep depletion devices with low dark signal and low noise sampling techniques.Engineering and Physical Sciences Research Council; e2v Technologie

Near-Infrared Sub-Bandgap All-Silicon Photodetectors: State of the Art and Perspectives

Due to recent breakthroughs, silicon photonics is now the most active discipline within the field of integrated optics and, at the same time, a present reality with commercial products available on the market. Silicon photodiodes are excellent detectors at visible wavelengths, but the development of high-performance photodetectors on silicon CMOS platforms at wavelengths of interest for telecommunications has remained an imperative but unaccomplished task so far. In recent years, however, a number of near-infrared all-silicon photodetectors have been proposed and demonstrated for optical interconnect and power-monitoring applications. In this paper, a review of the state of the art is presented. Devices based on mid-bandgap absorption, surface-state absorption, internal photoemission absorption and two-photon absorption are reported, their working principles elucidated and their performance discussed and compared

Differential Integrator Pixel Architecture for Dark Current Compensation in CMOS Image Sensors

RESUME Le Capteur d'Image CMOS (CIS) est rapidement devenu la technologie dominante dans les marchés de l'imagerie. Il y a des avantages sur les technologies avec CCD tels que la faible consommation de puissance et les faibles coûts. . La technologie CMOS APS s’est améliorée au cours des dernières décennies et propose une alternative viable à la technologie CCD pour de nombreuses applications. Néanmoins, les capteurs d’image CMOS APS ont un niveau plus élevé de courant d'obscurité que les capteurs CCD. Plusieurs techniques ont été développées pour améliorer la performance du capteur d'image en termes de courant d'obscurité qui limite sévèrement la gamme dynamique et la sensibilité des capteurs d'image. Il existe différentes approches pour réduire le courant d'obscurité. L'approche idéale, mais coûteuse, consiste à modifier le procédé de fabrication par améliorant la photosensibilité du pixel ou de réduire le courant de fuite. Cependant, certaines architectures de circuits peuvent être utilisées pour réduire ou compenser le courant d'obscurité sans modification de procédé, cette alternative fait l’objet de ce mémoire. Dans cette thèse, un circuit amplificateur différentiel multi-branche est proposé pour compenser l'effet de courant d'obscurité d’un capteurs d'image CMOS. Afin d'obtenir une application de détection à faible courant de noirceur, un interrupteur de type T avec un faible courant de fuite est utilisé. La nouvelle configuration de multiple-input multiple-output amplificateur différentiel présente l'avantage de réduire considérablement les courants d'obscurité femto-ampères des photodiodes. L'objectif étant d’améliorer la sensibilité et la gamme dynamique des pixels des capteurs d'image CMOS. Un prototype est conçu à partir du procédé de fabrication CMOS standard 0.18 µm de TSMC.----------ABSTRACT CMOS Image Sensor (CIS) rapidly became the dominant technology over Charge-Coupled-Device (CCD) in imaging markets. It has many advantages over CCDs such as low power and low cost which is highly desirable for imaging-enabled mobile devices. CMOS Active Pixel Sensor (APS) technology has improved during the last decades and suggests a viable alternative for many applications with CCD technology. Nonetheless, CMOS APS image sensors have higher dark current level than CCD sensors. Several techniques have been developed to improve the performance of image sensor in terms of dark current which severely limits the dynamic range and the sensitivity of image sensors. There are different approaches to reduce the dark current. The ideal but expensive approach is to modify the fabrication process by enhancing the photosensivity of the pixel or reducing the leakage current. However, some circuit and layout techniques reduce or compensate the dark current of standard CMOS processes which is the method considered in this work. In this thesis a multi-branch differential amplifier circuit is proposed to compensate the effect of dark current in CMOS image sensors. In order to obtain a low level sensing application, a T-type switch with low leakage current is used. The new configuration of multiple-input multiple-output differential amplifier has the advantage of compensating the femto-ampere dark currents of hotodiodes. The objective is to improve the sensitivity and the dynamic range of active pixel CMOS image sensors. A prototype is designed and simulated in a standard CMOS 0.18 µm fabrication process from TSMC