27 research outputs found

    Performance Analysis of Protograph LDPC Codes over Large-Scale MIMO Channels with Low-Resolution ADCs

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    © 2013 IEEE. Protograph LDPC (P-LDPC) codes and large-scale multiple-input multiple-output (LS-MIMO) are cornerstones of 5G and future wireless systems, thanks to their powerful error-correcting capability and high spectral efficiency. To alleviate the high complexity in signal detection/decoding that dramatically grows with the number of antennas (in the order of tens or even hundreds), low-resolution analog-to-digital converters (ADCs) and joint detection and decoding using factor graph have recently attracted paramount interest. Unlike high-resolution ADCs, by using a small number of bits to quantize the received signal, low-resolution ADCs help reduce the hardware cost and power consumption of the RF circuit of practical LS-MIMO transceivers. Such a very much desirable reduction comes at the cost of additional quantization noise, introduced by low-resolution ADCs. This work aims to provide a unified framework to analyze the impact of the low-resolution ADCs on the performance of P-LDPC codes in practical LS-MIMO systems. It is worth noting that the previous analytical tools that have been used to evaluate the performance of P-LDPC codes do not account for the quantization noise effect of the low-resolution ADCs and the fact that the covariance of quantization noise depends on the fading channels. This article addresses this shortcoming by first leveraging the additive quantization noise model. We then derive the expression of extrinsic information for the belief-propagation LS-MIMO detector. The mutual information functions, which are the core elements of our proposed protograph extrinsic information transfer (PEXIT) algorithm, are analyzed for LS-MIMO communication systems. Our proposed PEXIT algorithm allows us to analyze and predict the impact of the low-resolution ADCs on the performance of P-LDPC codes, considering various input parameters, including the LS-MIMO configuration, the code rate, and the maximum number of decoding iterations, and the code structure. Based on our extensive analytical and simulation results, we found that the performance of 3-bit and 4-bit ADC systems only have a small gap to that of the unquantized systems. Especially when the 5-bit ADC scheme is applied, the performance loss is negligible. This finding sheds light on the practical design of LS-MIMO systems using P-LDPC codes

    Constellation design for future communication systems: a comprehensive survey

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    [EN] The choice of modulation schemes is a fundamental building block of wireless communication systems. As a key component of physical layer design, they critically impact the expected communication capacity and wireless signal robustness. Their design is also critical for the successful roll-out of wireless standards that require a compromise between performance, efficiency, latency, and hardware requirements. This paper presents a survey of constellation design strategies and associated outcomes for wireless communication systems. The survey discusses their performance and complexity to address the need for some desirable properties, including consistency, channel capacity, system performance, required demapping architecture, flexibility, and independence. Existing approaches for constellation designs are investigated using appropriate metrics and categorized based on their theoretical algorithm design. Next, their application to different communication standards is analyzed in context, aiming at distilling general guidelines applicable to the wireless building block design. Finally, the survey provides a discussion on design directions for future communication system standardization processes.This work was supported in part by the Basque Government under Grant IT1234-19, in part by the PREDOC under Program PRE_2020_2_0105, and in part by the Spanish Government through the Project PHANTOM (MCIU/AEI/FEDER, UE) under Gran

    Hardware-Conscious Wireless Communication System Design

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    The work at hand is a selection of topics in efficient wireless communication system design, with topics logically divided into two groups.One group can be described as hardware designs conscious of their possibilities and limitations. In other words, it is about hardware that chooses its configuration and properties depending on the performance that needs to be delivered and the influence of external factors, with the goal of keeping the energy consumption as low as possible. Design parameters that trade off power with complexity are identified for analog, mixed signal and digital circuits, and implications of these tradeoffs are analyzed in detail. An analog front end and an LDPC channel decoder that adapt their parameters to the environment (e.g. fluctuating power level due to fading) are proposed, and it is analyzed how much power/energy these environment-adaptive structures save compared to non-adaptive designs made for the worst-case scenario. Additionally, the impact of ADC bit resolution on the energy efficiency of a massive MIMO system is examined in detail, with the goal of finding bit resolutions that maximize the energy efficiency under various system setups.In another group of themes, one can recognize systems where the system architect was conscious of fundamental limitations stemming from hardware.Put in another way, in these designs there is no attempt of tweaking or tuning the hardware. On the contrary, system design is performed so as to work around an existing and unchangeable hardware limitation. As a workaround for the problematic centralized topology, a massive MIMO base station based on the daisy chain topology is proposed and a method for signal processing tailored to the daisy chain setup is designed. In another example, a large group of cooperating relays is split into several smaller groups, each cooperatively performing relaying independently of the others. As cooperation consumes resources (such as bandwidth), splitting the system into smaller, independent cooperative parts helps save resources and is again an example of a workaround for an inherent limitation.From the analyses performed in this thesis, promising observations about hardware consciousness can be made. Adapting the structure of a hardware block to the environment can bring massive savings in energy, and simple workarounds prove to perform almost as good as the inherently limited designs, but with the limitation being successfully bypassed. As a general observation, it can be concluded that hardware consciousness pays off

    Reduced Receivers for Faster-than-Nyquist Signaling and General Linear Channels

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    Fast and reliable data transmission together with high bandwidth efficiency are important design aspects in a modern digital communication system. Many different approaches exist but in this thesis bandwidth efficiency is obtained by increasing the data transmission rate with the faster-than-Nyquist (FTN) framework while keeping a fixed power spectral density (PSD). In FTN consecutive information carrying symbols can overlap in time and in that way introduce a controlled amount of intentional intersymbol interference (ISI). This technique was introduced already in 1975 by Mazo and has since then been extended in many directions. Since the ISI stemming from practical FTN signaling can be of significant duration, optimum detection with traditional methods is often prohibitively complex, and alternative equalization methods with acceptable complexity-performance tradeoffs are needed. The key objective of this thesis is therefore to design reduced-complexity receivers for FTN and general linear channels that achieve optimal or near-optimal performance. Although the performance of a detector can be measured by several means, this thesis is restricted to bit error rate (BER) and mutual information results. FTN signaling is applied in two ways: As a separate uncoded narrowband communication system or in a coded scenario consisting of a convolutional encoder, interleaver and the inner ISI mechanism in serial concatenation. Turbo equalization where soft information in the form of log likelihood ratios (LLRs) is exchanged between the equalizer and the decoder is a commonly used decoding technique for coded FTN signals. The first part of the thesis considers receivers and arising stability problems when working within the white noise constraint. New M-BCJR algorithms for turbo equalization are proposed and compared to reduced-trellis VA and BCJR benchmarks based on an offset label idea. By adding a third low-complexity M-BCJR recursion, LLR quality is improved for practical values of M. M here measures the reduced number of BCJR computations for each data symbol. An improvement of the minimum phase conversion that sharpens the focus of the ISI model energy is proposed. When combined with a delayed and slightly mismatched receiver, the decoding allows a smaller M without significant loss in BER. The second part analyzes the effect of the internal metric calculations on the performance of Forney- and Ungerboeck-based reduced-complexity equalizers of the M-algorithm type for both ISI and multiple-input multiple-output (MIMO) channels. Even though the final output of a full-complexity equalizer is identical for both models, the internal metric calculations are in general different. Hence, suboptimum methods need not produce the same final output. Additionally, new models working in between the two extremes are proposed and evaluated. Note that the choice of observation model does not impact the detection complexity as the underlying algorithm is unaltered. The last part of the thesis is devoted to a different complexity reducing approach. Optimal channel shortening detectors for linear channels are optimized from an information theoretical perspective. The achievable information rates of the shortened models as well as closed form expressions for all components of the optimal detector of the class are derived. The framework used in this thesis is more general than what has been previously used within the area

    Performance Evaluation of Optimized Physical Layer Network Coding

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    With the development of the wireless networks these years, devices are required to have an even higher data rate, and thus the interference between devices remains a significant problem to be solved. In order to secure a reliable transmission with- out wasting network capacity, we would necessarily select a proper transmission scheme. The Physical layer Network Coding (PNC) , is one of the optimum choices as it can increase the efficiency largely, especially in a system with 2 users and 1 relay (TWRC). Generally speaking, we may divide our research into two aspects: channel and channel coding. From the channel coding’s view, we build the system of uncoded QPSK mod- ulated PNC and convolutional coded PNC (again modulated by QPSK). Due to the feature of the superimposed QPSK constellation, we introduce 3 different fixed mappings (plus the adaptive mapping) in order to decode the superimposed sym- bols at the relay more preciously. Also, we derive the theoretical upper bound of the error rate of the superimposed symbols at the relay. For uncoded PNC, we derive the SER; for coded PNC, we derive the BER, and we focus on an finite accumulation of the terms so as to obtain a tight error bound which is closer to the BER curve of the symbol-level simulation. From the channel’s view, we build the system of QPSK modulated PNC on single- carrier channel and the PNC on OFDM channels. For PNC on single-carrier channels, we assume the transmission channels are all flat fading channels. Never- theless, it is quite difficult for it to cope with the frequency selective channels and time delay channels. As a result, we introduce OFDM technique which can largely resist their interferences. We develop different adaptive mappings on OFDM inside the sub-band to further improve the performance. The theoretical upper bound for the error rate of the superimposed signals received at the relay will be vital in the system-level simulation, which is the part of the project DIWINE that my research benefits from

    Software Defined Radio Solutions for Wireless Communications Systems

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    Wireless technologies have been advancing rapidly, especially in the recent years. Design, implementation, and manufacturing of devices supporting the continuously evolving technologies require great efforts. Thus, building platforms compatible with different generations of standards and technologies has gained a lot of interest. As a result, software defined radios (SDRs) are investigated to offer more flexibility and scalability, and reduce the design efforts, compared to the conventional fixed-function hardware-based solutions.This thesis mainly addresses the challenges related to SDR-based implementation of today’s wireless devices. One of the main targets of most of the wireless standards has been to improve the achievable data rates, which imposes strict requirements on the processing platforms. Realizing real-time processing of high throughput signal processing algorithms using SDR-based platforms while maintaining energy consumption close to conventional approaches is a challenging topic that is addressed in this thesis.Firstly, this thesis concentrates on the challenges of a real-time software-based implementation for the very high throughput (VHT) Institute of Electrical and Electronics Engineers (IEEE) 802.11ac amendment from the wireless local area networks (WLAN) family, where an SDR-based solution is introduced for the frequency-domain baseband processing of a multiple-input multipleoutput (MIMO) transmitter and receiver. The feasibility of the implementation is evaluated with respect to the number of clock cycles and the consumed power. Furthermore, a digital front-end (DFE) concept is developed for the IEEE 802.11ac receiver, where the 80 MHz waveform is divided to two 40 MHz signals. This is carried out through time-domain digital filtering and decimation, which is challenging due to the latency and cyclic prefix (CP) budget of the receiver. Different multi-rate channelization architectures are developed, and the software implementation is presented and evaluated in terms of execution time, number of clock cycles, power, and energy consumption on different multi-core platforms.Secondly, this thesis addresses selected advanced techniques developed to realize inband fullduplex (IBFD) systems, which aim at improving spectral efficiency in today’s congested radio spectrum. IBFD refers to concurrent transmission and reception on the same frequency band, where the main challenge to combat is the strong self-interference (SI). In this thesis, an SDRbased solution is introduced, which is capable of real-time mitigation of the SI signal. The implementation results show possibility of achieving real-time sufficient SI suppression under time-varying environments using low-power, mobile-scale multi-core processing platforms. To investigate the challenges associated with SDR implementations for mobile-scale devices with limited processing and power resources, processing platforms suitable for hand-held devices are selected in this thesis work. On the baseband processing side, a very long instruction word (VLIW) processor, optimized for wireless communication applications, is utilized. Furthermore, in the solutions presented for the DFE processing and the digital SI canceller, commercial off-the-shelf (COTS) multi-core central processing units (CPUs) and graphics processing units (GPUs) are used with the aim of investigating the performance enhancement achieved by utilizing parallel processing.Overall, this thesis provides solutions to the challenges of low-power, and real-time software-based implementation of computationally intensive signal processing algorithms for the current and future communications systems

    Self-interference cancellation for full-duplex MIMO transceivers

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    PhD ThesisIn recent years, there has been enormous interest in utilizing the full-duplex (FD) technique with multiple-input multiple-output (MIMO) systems to complement the evolution of fifth generation technologies. Transmission and reception using FD-MIMO occur simultaneously over the same frequency band and multiple antennas are employed in both sides. The motivation for employing FD-MIMO is the rapidly increasing demand on frequency resources, and also FD has the ability to improve spectral efficiency and channel capacity by a factor of two compared to the conventional half-duplex technique. Additionally, MIMO can enhance the diversity gain and enable FD to acquire further degrees of freedom in mitigating the self-interference (SI). The latter is one of the key challenges degrading the performance of systems operating in FD mode due to local transmission which involves larger power level than the signals of interest coming from distance sources that are significantly more attenuated due to path loss propagation phenomena. Various approaches can be used for self-interference cancellation (SIC) to tackle SI by combining passive suppression with the analogue and digital cancellation techniques. Moreover, active SIC techniques using special domain suppression based on zero-forcing and null-space projection (NSP) can be exploited for this purpose too. The main contributions of this thesis can be summarized as follows. Maximum-ratio combining with NSP are jointly exploited in order to increase the signal-to-noise ratio (SNR) of the desired path and mitigate the undesired loop path, respectively, for an equalize-and-forward (EF) relay using FD-MIMO. Additionally, an end-to-end performance analysis of the proposed system is obtained in the presence of imperfect channel state information by formulating mathematically the exact closed-form solutions for the signal-to-interference-plus-noise ratio (SINR) distribution, outage probability, and average symbol-error rate for uncoded M-ary phase-shift keying over Rayleigh fading channels and in the presence of additive white Gaussian noise (AWGN). The coefficients of the EF-relay are designed to attain the minimum mean-square error (MMSE) between the transmission symbols. Comparison of the results obtained with relevant state-of-the-art techniques suggests significant improvements in the SINR figures and system capacity. Furthermore, iterative detection and decoding (IDD) are proposed to mitigate the residual self-interference (SI) remaining after applying passive suppression along with two stages of SI cancellation (SIC) filters in the analogue and digital domains for coded FD bi-directional transceiver based multiple antennas. IDD comprises an adaptive MMSE filter with log-likelihood ratio demapping, while the soft-in soft-out decoder utilizes the maximum a posteriori (MAP) algorithm. The proposed system’s performance is evaluated in the presence of AWGN over non-selective (flat) Rayleigh fading single-input multiple-output (SIMO) and MIMO channels. However, the results of the analyses can be applied to multi-path channels if orthogonal frequency division multiplexing is utilised with a proper length of cyclic prefix in order to tackle the channels’ frequency-selectivity and delay spread. Simulation results are presented to demonstrate the bit-error rate (BER) performance as a function of the SNR, revealing a close match to the SI-free case for the proposed system. Furthermore, the results are validated by deriving a tight upper bound on the performance of rate-1=2 convolutional codes for FD-SIMO and FD-MIMO systems for different modulation schemes under the same conditions, which asymptotically exhibits close agreement with the simulated BER performance.Ministry of Higher Education and Scientific Research (MoHESR), and the University of Mosul and to the Iraqi Cultural Attache in London for providing financial support for my PhD scholarship

    Design of large polyphase filters in the Quadratic Residue Number System

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    Temperature aware power optimization for multicore floating-point units

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