Simulation study of vertically stacked lateral Si nanowires transistors for 5 nm CMOS applications

In this paper we present a simulation study of vertically stacked lateral nanowires transistors (NWTs), which may have applications at 5nm CMOS technology. Our simulation approach is based on a collection of simulation techniques to capture the complexity in such ultra-scaled devices. Initially, we used drift-diffusion methodology with activated Poisson-Schrodinger quantum corrections to accurately capture the quantum confinement in the cross-section of the device. Ensemble Monte Carlo simulations are used to accurately evaluate the drive current capturing the complexity of the carrier transport in the NWTs. We compared the current flow in single, double, and triple vertically stacked lateral NWTs with and without contact resistance. The results presented here suggest a consistent link between channel strain and device performance. Furthermore, we propose a device structure for the 5nm CMOS technology node that meets the required industry scaling projection. We also consider the interplay between various sources of statistical variability and reliability in this work

Bandgap engineering in semiconductor alloy nanomaterials with widely tunable compositions

Over the past decade, tremendous progress has been achieved in the development of nanoscale semiconductor materials with a wide range of bandgaps by alloying different individual semiconductors. These materials include traditional II-VI and III-V semiconductors and their alloys, inorganic and hybrid perovskites, and the newly emerging 2D materials. One important common feature of these materials is that their nanoscale dimensions result in a large tolerance to lattice mismatches within a monolithic structure of varying composition or between the substrate and target material, which enables us to achieve almost arbitrary control of the variation of the alloy composition. As a result, the bandgaps of these alloys can be widely tuned without the detrimental defects that are often unavoidable in bulk materials, which have a much more limited tolerance to lattice mismatches. This class of nanomaterials could have a far-reaching impact on a wide range of photonic applications, including tunable lasers, solid-state lighting, artificial photosynthesis and new solar cells

Electrical performance of efficient quad-crescent-shaped Si nanowire solar cell

The electrical characteristics of quad-crescent-shaped silicon nanowire (NW) solar cells (SCs) are numerically analyzed and as a result their performance optimized. The structure discussed consists of four crescents, forming a cavity that permits multiple light scattering with high trapping between the NWs. Additionally, new modes strongly coupled to the incident light are generated along the NWs. As a result, the optical absorption has been increased over a large portion of light wavelengths and hence the power conversion efficiency (PCE) has been improved. The electron–hole (e–h) generation rate in the design reported has been calculated using the 3D finite difference time domain method. Further, the electrical performance of the SC reported has been investigated through the finite element method, using the Lumerical charge software package. In this investigation, the axial and core–shell junctions were analyzed looking at the reported crescent and, as well, conventional NW designs. Additionally, the doping concentration and NW-junction position were studied in this design proposed, as well as the carrier-recombination-and-lifetime effects. This study has revealed that the high back surface field layer used improves the conversion efficiency by ∼ 80%. Moreover, conserving the NW radial shell as a low thickness layer can efficiently reduce the NW sidewall recombination effect. The PCE and short circuit current were determined to be equal to 18.5% and 33.8 mA/cm$^{2}$ for the axial junction proposed. However, the core–shell junction shows figures of 19% and 34.9 mA/cm$^{2}$. The suggested crescent design offers an enhancement of 23% compared to the conventional NW, for both junctions. For a practical surface recombination velocity of 10$^{2}$ cm/s, the PCE of the proposed design, in the axial junction, has been reduced to 16.6%, with a reduction of 11%. However, the core–shell junction achieves PCE of 18.7%, with a slight reduction of 1.6%. Therefore, the optoelectronic performance of the core–shell junction was marginally affected by the NW surface recombination, compared to the axial junction

Towards Single-Chip Nano-Systems

Important scientific discoveries are being propelled by the advent of nano-scale sensors that capture weak signals from their environment and pass them to complex instrumentation interface circuits for signal detection and processing. The highlight of this research is to investigate fabrication technologies to integrate such precision equipment with nano-sensors on a single complementary metal oxide semiconductor (CMOS) chip. In this context, several demonstration vehicles are proposed. First, an integration technology suitable for a fully integrated flexible microelectrode array has been proposed. A microelectrode array containing a single temperature sensor has been characterized and the versatility under dry/wet, and relaxed/strained conditions has been verified. On-chip instrumentation amplifier has been utilized to improve the temperature sensitivity of the device. While the flexibility of the array has been confirmed by laminating it on a fixed single cell, future experiments are necessary to confirm application of this device for live cell and tissue measurements. The proposed array can potentially attach itself to the pulsating surface of a single living cell or a network of cells to detect their vital signs

Skybridge-3D-CMOS: A Fine-Grained Vertical 3D-CMOS Technology Paving New Direction for 3D IC

2D CMOS integrated circuit (IC) technology scaling faces severe challenges that result from device scaling limitations, interconnect bottleneck that dominates power and performance, etc. 3D ICs with die-die and layer-layer stacking using Through Silicon Vias (TSVs) and Monolithic Inter-layer Vias (MIVs) have been explored in recent years to generate circuits with considerable interconnect saving for continuing technology scaling. However, these 3D IC technologies still rely on conventional 2D CMOS’s device, circuit and interconnect mindset showing only incremental benefits while adding new challenges reliability issues, robustness of power delivery network design and short-channel effects as technology node scaling. Skybridge-3D-CMOS (S3DC) is a fine-grained 3D IC fabric that uses vertically-stacked gates and 3D interconnections composed on vertical nanowires to yield orders of magnitude benefits over 2D ICs. This 3D fabric fully uses the vertical dimension instead of relying on a multi-layered 2D mindset. Its core fabric aspects including device, circuit-style, interconnect and heat-extraction components are co-architected considering the major challenges in 3D IC technology. In S3DC, the 3D interconnections provide greater routing capacity in both vertical and horizontal directions compared to conventional 3D ICs, which eliminates the routability issue in conventional 3D IC technology while enabling ultra-high density design and significant benefits over 2D. Also, the improved vertical routing capacity in S3DC is beneficial for achieving robust and high-density power delivery network (PDN) design while conventional 3D IC has design issues in PDN design due to limited routing resource in vertical direction. Additionally, the 3D gate-all-around transistor incorporating with 3D interconnect in S3DC enables significant SRAM design benefits and good tolerance of process variation compared to conventional 3D IC technology as well as 2D CMOS. The transistor-level (TR-L) monolithic 3D IC (M3D) is the state-of-the-art monolithic 3D technology which shows better benefits than other M3D approaches as well as the TSV-based 3D IC approach. The S3DC is evaluated in large-scale benchmark circuits with comparison to TR-L M3D as well as 2D CMOS. Skybridge yields up to 3x lower power against 2D with no routing congestion in benchmark circuits while TR-L M3D only has up-to 22% power saving with severe routing congestions in the design. The PDN design in S3DC show

Model for reflection and transmission matrices of nanowire end facets

Nanowires show a large potential for various electrooptical devices, such as light emitting diodes, solar cells and nanowire lasers. We present a direct method developed to calculate the modal reflection and transmission matrix at the end facets of a waveguide of arbitrary cross section, resulting in a generalized version of the Fresnel equations. The reflection can be conveniently computed using Fast Fourier Transforms. We demonstrate that the reflection is qualitatively described by two main parameters, the modal field confinement and the average Fresnel reflection of the plane waves constituting the waveguide mode.Comment: 11 pages,14 figure

Advanced Photovoltaic Devices Enabled by Lattice-Mismatched Epitaxy

Thin-film III-V semiconductor-based photovoltaic (PV) devices, whose light conversion efficiency is primarily limited by the minority carrier lifetimes, are commonly designed to minimize the formation of crystalline defects (threading dislocations or, in extreme cases, fractures) that can occur, in particular, due to a mismatch in lattice constants of the epitaxial substrate and of the active film. At the same time, heteroepitaxy using Si or metal foils instead of costly III-V substrates is a pathway to enabling low-cost thin-film III-V-based PV and associated devices, yet it requires to either use metamorphic buffers or lateral confinement either by substrate patterning or by growing high aspect ratio structures. Mismatched epitaxy can be used for high-efficiency durable III-V space PV systems by incorporation of properly engineered strained quantum confined structures into the solar cells that can enable bandgap engineering and enhanced radiation tolerance. One of the major topics covered in this work is optical and optoelectronic modeling and physics of the triple-junction solar cell featuring planar Si middle sub-cell and GaAs0.73P0.27 and InAs0.85P0.15 periodic nanowire (NW) top and bottom sub-cells, respectively. In particular, the dimensions of the NW arrays that would enable near-unity broad-band absorption for maximum generated current were identified. For the top cell, the planarized array dimensions corresponding to maximum generated current and current matching with the underlying Si sub-cell were found to be 350 nm for NW diameter and 450 – 500 nm for NW spacing. For the GaAs0.73P0.27, resonant coupling was the main factor driving the absorption, yet addressing the coupling of IR light in the transmission mode in the InAs0.85P0.15 nanoscale arrays was challenging and unique. Given the nature of the Si and bottom NW interface, the designs of high refractive index encapsulation materials and conformal reflectors were proposed to enable the use of thin NWs (300 – 400 nm) for sufficient IR absorption. A novel co-simulation tool combining RSoft DiffractMOD® and Sentaurus Device® was established and utilized to design the p-i-n 3D junction and thin conformal GaP passivation coating for maximum GaAs0.73P0.27 NW sub-cell efficiency (16.5%) mainly impacted by the carrier surface annihilation. Development of a highly efficient GaAs solar cell enhanced with InxGa1-xAs/GaAsyP1-y quantum wells (QWs) is also demonstrated as one of the key parts of the dissertation. The optimizations including design of GaAsP strain balancing that would support efficient thermal (here, 17 nm-thick GaAs0.90P0.10 for 9.2 nm-thick In0.10Ga0.90As QWs) and/or tunneling (4.9 nm-thick GaAs0.68P0.32) carrier escape out of the QW while maintaining a consistent morphology of the QW layers in extended QW superlattices were performed using the principles of strain energy minimization and by tuning the growth parameters. The fundamental open-circuit voltage (V¬oc) restraints in radiative and non-radiative recombination-limited regimes in the QW solar cells were studied for a variety of InxGa1-xAs compositions (x=6%, 8%, 10%, and 14%) and number of QWs using spectroscopic and dark current analysis and modeling. Additionally, the design and use of distributed Bragg reflectors for targeted up to 90% QW absorption enhancement is demonstrated resulting in an absolute QW solar cell efficiency increase by 0.4% due to nearly doubled current from the QWs and 0.1% enhancement relatively to the optically-thick baseline device with no QWs

On emerging micro- and nanoscale thermofluidic technologies

This paper was presented at the 2nd Micro and Nano Flows Conference (MNF2009), which was held at Brunel University, West London, UK. The conference was organised by Brunel University and supported by the Institution of Mechanical Engineers, IPEM, the Italian Union of Thermofluid dynamics, the Process Intensification Network, HEXAG - the Heat Exchange Action Group and the Institute of Mathematics and its Applications.This paper highlights examples of my current research in heat transfer and fluidics at the interface of energy applications and micro- and nanoscale technologies. It is not the scope of this paper to present an exhaustive account of all current and past activities related to its title. It is rather an account of current research in my laboratory in this area, containing both the underlying scientific challenges as well as the hoped final outcome in terms of applications. To this end, examples from the areas of energy conversion, as well as energy transport will be discussed. In the area of energy conversion an original, deformable, direct methanol microfuel cell will be presented made of lightweight, flexible, polymer-based materials. A basic understanding and control of two-phase flows (in this case methanol and carbon dioxide) in microchannels as well as novel materials processing and microfabrication methods are directly related to the performance of such energy conversion devices. In the area of energy conservation and reuse, examples from the information technology are employed. Specifically, new concepts of liquid (water) cooling of chips reaching heat removal rates in excess of 700 W/cm2 in domains with restricted heights of the order of one mm will be presented. One additional advantage of using water to cool high density electronics is energy reuse, due to the potentially much higher exergy content of the coolant compared to air cooled technologies. The last part of the paper focuses on the employment of functional nanostructures such as carbon nanotubes and nanowires of conductive and semiconductive materials for the efficient transport of electricity and heat and the need for the development of novel technologies for the manufacturing, characterization as well as handling of such nanostructures

Broadband High Efficiency Fractal-Like and Diverse Geometry Silicon Nanowire Arrays for Photovoltaic Applications

Solar energy has many advantages over conventional sources of energy. It is abundant, clean and sustainable. One way to convert solar energy directly into electrical energy is by using the photovoltaic solar cells (PVSC). Despite PVSC are becoming economically competitive, they still have high cost and low light to electricity conversion efficiency. Therefore, increasing the efficiency and reducing the cost are key elements for producing economically more competitive PVSC that would have significant impact on energy market and saving environment. A significant percentage of the PVSC cost is due to the materials cost. For that, thin films PVSC have been proposed which offer the benefits of the low amount of material and fabrication costs. Regrettably, thin film PVSC show poor light to electricity conversion efficiency because of many factors especially the high optical losses. To enhance conversion efficiency, numerous techniques have been proposed to reduce the optical losses and to enhance the absorption of light in thin film PVSC. One promising technique is the nanowire (NW) arrays in general and the silicon nanowire (SiNW) arrays in particular. The purpose of this research is to introduce vertically aligned SiNW arrays with enhanced and broadband absorption covering the entire solar spectrum while simultaneously reducing the amount of material used. To this end, we apply new concept for designing SiNW arrays based on employing diversity of physical dimensions, especially radial diversity within certain lattice configurations. In order to study the interaction of light with SiNW arrays and compute their optical properties, electromagnetic numerical modeling is used. A commercial numerical electromagnetic solver software package, high frequency structure simulation (HFSS), is utilized to model the SiNW arrays and to study their optical properties. We studied different geometries factors that affect the optical properties of SiNW arrays. Based on this study, we found that the optical properties of SiNW arrays are strongly affected by the radial diversity, the arrangement of SiNW in a lattice, and the configuration of such lattice. The proper selection of these parameters leads to broaden and enhance the light absorption of the SiNW arrays. Inspired by natural configurations, fractal geometry and diamond lattice structures, we introduced two lattice configurations: fractal-like array (FLA) that is inspired by fractal geometry, and diamond-like array (DLA) that is inspired by diamond crystal lattice structure. Optimization, using parametric analysis, of the introduced arrays parameters for the light absorption level and the amount of used material has been performed. Both of the introduced SiNW arrays show broadband, strong light absorption coupled with reduction of the amount of the used material. DLA in specific showed significantly enhanced absorption covering the entire solar spectrum of interest, where near-unity absorption spectrum could be achieved. We studied the optical properties of complete PVSC devices that are based on SiNW array. Moreover, the performance of PVSC device that is based on SiNW has been investigated by using numerical modeling. SILVACO software package is used for performing the numerical simulation of the PVSC device performance, which can simultaneously handle the different coupled physical mechanisms contributing to the photovoltaic effect. The effect of the geometry of PVSC device that is based on SiNW is investigated, which shows that the geometry of such PVSC has a role in enhancing its electrical properties. The outcome of this study introduces new SiNW array configurations that have enhanced optical properties using a low amount of material that can be utilized for producing higher efficiency thin film PVCS. The overall conclusion of this work is that a weak absorption indirect band gap material, silicon, in the form of properly designed SiNW and SiNC arrays has the potentials to achieve near-unity ideal absorption spectrum using reduced amount of material, which can lead to produce new generation of lower cost and enhanced efficiency thin film PVSC