3,932 research outputs found
Multi-Level Pre-Correlation RFI Flagging for Real-Time Implementation on UniBoard
Because of the denser active use of the spectrum, and because of radio
telescopes higher sensitivity, radio frequency interference (RFI) mitigation
has become a sensitive topic for current and future radio telescope designs.
Even if quite sophisticated approaches have been proposed in the recent years,
the majority of RFI mitigation operational procedures are based on
post-correlation corrupted data flagging. Moreover, given the huge amount of
data delivered by current and next generation radio telescopes, all these RFI
detection procedures have to be at least automatic and, if possible, real-time.
In this paper, the implementation of a real-time pre-correlation RFI
detection and flagging procedure into generic high-performance computing
platforms based on Field Programmable Gate Arrays (FPGA) is described,
simulated and tested. One of these boards, UniBoard, developed under a Joint
Research Activity in the RadioNet FP7 European programme is based on eight
FPGAs interconnected by a high speed transceiver mesh. It provides up to ~4
TMACs with Altera Stratix IV FPGA and 160 Gbps data rate for the input data
stream.
Considering the high in-out data rate in the pre-correlation stages, only
real-time and go-through detectors (i.e. no iterative processing) can be
implemented. In this paper, a real-time and adaptive detection scheme is
described.
An ongoing case study has been set up with the Electronic Multi-Beam Radio
Astronomy Concept (EMBRACE) radio telescope facility at Nan\c{c}ay Observatory.
The objective is to evaluate the performances of this concept in term of
hardware complexity, detection efficiency and additional RFI metadata rate
cost. The UniBoard implementation scheme is described.Comment: 16 pages, 13 figure
Ternary content addressable memory for longest prefix matching based on random access memory on field programmable gate array
Conventional ternary content addressable memory (TCAM) provides access to stored data, which consists of '0', '1' and ‘don't care’, and outputs the matched address. Content lookup in TCAM can be done in a single cycle, which makes it very important in applications such as address lookup and deep-packet inspection. This paper proposes an improved TCAM architecture with fast update functionality. To support longest prefix matching (LPM), LPM logic are needed to the proposed TCAM. The latency of the proposed LPM logic is dependent on the number of matching addresses in address prefix comparison. In order to improve the throughput, parallel LPM logic is added to improve the throughput by 10× compared to the one without. Although with resource overhead, the cost of throughput per bit is less as compared to the one without parallel LPM logic
- …