Android based security and home automation system

The smart mobile terminal operator platform Android is getting popular all over the world with its wide variety of applications and enormous use in numerous spheres of our daily life. Considering the fact of increasing demand of home security and automation, an Android based control system is presented in this paper where the proposed system can maintain the security of home main entrance and also the car door lock. Another important feature of the designed system is that it can control the overall appliances in a room. The mobile to security system or home automation system interface is established through Bluetooth. The hardware part is designed with the PIC microcontroller.Comment: 10 pages,17 figures, Journal, International Journal of Ambient Systems and Applications, Volume 3, 201

Hardware Implementation of TDES Crypto System with On Chip Verification in FPGA

Security issues are playing dominant role in today's high speed communication systems. A fast and compact FPGA based implementation of the Data Encryption Standard (DES) and Triple DES algorithm is presented in this paper that is widely used in cryptography for securing the Internet traffic in modern day communication systems. The design of the digital cryptographic circuit was implemented in a Vertex 5 series (XCVLX5110T) target device with the use of VHDL as the hardware description language. In order to confirm the expected behavior of these algorithms, the proposed design was extensively simulated, synthesized for different FPGA devices both in Spartan and Virtex series from Xilinx viz. Spartan 3, Spartan 3AN, Virtex 5, Virtex E device families. The novelty and contribution of this work is in three folds: (i) Extensive simulation and synthesis of the proposed design targeted for various FPGA devices, (ii) Complete hardware implementation of encryption and decryption algorithms onto Virtex 5 series device (XCVLX5110T) based FPGA boards and, (iii) Generation of ICON and VIO core for the design and on chip verification and analyzing using Chipscope Pro. The experimental as well as implementation results compared to the implementations reported so far are quite encouraging.Comment: Journal of Telecommunications,Volume 1, Issue 1, pp113-117, February 201

Effectiveness of Intrusion Prevention Systems (IPS) in Fast Networks

Computer systems are facing biggest threat in the form of malicious data which causing denial of service, information theft, financial and credibility loss etc. No defense technique has been proved successful in handling these threats. Intrusion Detection and Prevention Systems (IDPSs) being best of available solutions. These techniques are getting more and more attention. Although Intrusion Prevention Systems (IPSs) show a good level of success in detecting and preventing intrusion attempts to networks, they show a visible deficiency in their performance when they are employed on fast networks. In this paper we have presented a design including quantitative and qualitative methods to identify improvement areas in IPSs. Focus group is used for qualitative analysis and experiment is used for quantitative analysis. This paper also describes how to reduce the responding time for IPS when an intrusion occurs on network, and how can IPS be made to perform its tasks successfully without effecting network speed negatively.Comment: IEEE Publication Format, https://sites.google.com/site/journalofcomputing

Hardware Architecture of Complex K-best MIMO Decoder

This paper presents a hardware architecture of complex K-best Multiple Input Multiple Output (MIMO) decoder reducing the complexity of Maximum Likelihood (ML) detector. We develop a novel low-power VLSI design of complex K-best decoder for 8x8 MIMO and 64 QAM modulation scheme. Use of Schnorr-Euchner (SE) enumeration and a new parameter, Rlimit in the design reduce the complexity of calculating K-best nodes to a certain level with increased performance. The total word length of only 16 bits has been adopted for the hardware design limiting the bit error rate (BER) degradation to 0.3 dB with list size, K and Rlimit equal to 4. The proposed VLSI architecture is modeled in Verilog HDL using Xilinx and synthesized using Synopsys Design Vision in 45 nm CMOS technology. According to the synthesize result, it achieves 1090.8 Mbps throughput with power consumption of 782 mW and latency of 0.044 us. The maximum frequency the design proposed is 181.8 MHz.Comment: 13 pages, 5 figures, 1 tabl

Fixed Point Realization of Iterative LR-Aided Soft MIMO Decoding Algorithm

Multiple-input multiple-output (MIMO) systems have been widely acclaimed in order to provide high data rates. Recently Lattice Reduction (LR) aided detectors have been proposed to achieve near Maximum Likelihood (ML) performance with low complexity. In this paper, we develop the fixed point design of an iterative soft decision based LR-aided K-best decoder, which reduces the complexity of existing sphere decoder. A simulation based word-length optimization is presented for physical implementation of the K-best decoder. Simulations show that the fixed point result of 16 bit precision can keep bit error rate (BER) degradation within 0.3 dB for 8x8 MIMO systems with different modulation schemes.Comment: submitted to SPIJ (Signal Processing: An International Journal),(under review), 10 pages, 5 figure

Hardware Virtualization Support In INTEL, AMD And IBM Power Processors

At present, the mostly used and developed mechanism is hardware virtualization which provides a common platform to run multiple operating systems and applications in independent partitions. More precisely, it is all about resource virtualization as the term hardware virtualization is emphasized. In this paper, the aim is to find out the advantages and limitations of current virtualization techniques, analyze their cost and performance and also depict which forthcoming hardware virtualization techniques will able to provide efficient solutions for multiprocessor operating systems. This is done by making a methodical literature survey and statistical analysis of the benchmark reports provided by SPEC (Standard Performance Evaluation Corporation) and TPC (Transaction processing Performance Council). Finally, this paper presents the current aspects of hardware virtualization which will help the IT managers of the large organizations to take effective decision while choosing server with virtualization support. Again, the future works described in section 4 of this paper focuses on some real world challenges such as abstraction of multiple servers, language level virtualization, pre-virtualization etc. which may be point of great interest for the researchers.Comment: 6 Pages IEEE format, International Journal of Computer Science and Information Security, IJCSIS 2009, ISSN 1947 5500, Impact factor 0.423, http://sites.google.com/site/ijcsis

On-Demand Grid Provisioning Using Cloud Infrastructures and Related Virtualization Tools: A Survey and Taxonomy

Recent researches have shown that grid resources can be accessed by client on-demand, with the help of virtualization technology in the Cloud. The virtual machines hosted by the hypervisors are being utilized to build the grid network within the cloud environment. The aim of this study is to survey some concepts used for the on-demand grid provisioning using Infrastructure as a Service Cloud and the taxonomy of its related components. This paper, discusses the different approaches for on-demand grid using infrastructural Cloud, the issues it tries to address and the implementation tools. The paper also, proposed an extended classification for the virtualization technology used and a new classification for the Grid-Cloud integration which was based on the architecture, communication flow and the user demand for the Grid resources. This survey, tools and taxonomies presented here will contribute as a guide in the design of future architectures for further researches.Comment: 11 page, 6 figures, 1 tabl

A Roadmap Towards Resilient Internet of Things for Cyber-Physical Systems

The Internet of Things (IoT) is a ubiquitous system connecting many different devices - the things - which can be accessed from the distance. The cyber-physical systems (CPS) monitor and control the things from the distance. As a result, the concepts of dependability and security get deeply intertwined. The increasing level of dynamicity, heterogeneity, and complexity adds to the system's vulnerability, and challenges its ability to react to faults. This paper summarizes state-of-the-art of existing work on anomaly detection, fault-tolerance and self-healing, and adds a number of other methods applicable to achieve resilience in an IoT. We particularly focus on non-intrusive methods ensuring data integrity in the network. Furthermore, this paper presents the main challenges in building a resilient IoT for CPS which is crucial in the era of smart CPS with enhanced connectivity (an excellent example of such a system is connected autonomous vehicles). It further summarizes our solutions, work-in-progress and future work to this topic to enable "Trustworthy IoT for CPS". Finally, this framework is illustrated on a selected use case: A smart sensor infrastructure in the transport domain.Comment: preprint (2018-10-29

Comparative Analysis of Distributed and Parallel File Systems' Internal Techniques

A file system optimization is the most common task in the file system field. Usually, it is seen as the key file system problem. Moreover, it is possible to state that optimization is dominant in commercial development. A problem of a new file system architecture development arises more frequently in academia. End-user can treat file system performance as the key problem of file system evolving as technology. Such understanding arises from common treatment of persistent memory as slow subsystem. As a result, problem of improving performance of data processing treats as a problem of file system performance optimization. However, evolution of physical technologies of persistent data storage requires significant changing of concepts and approaches of file systems' internal techniques. Generally speaking, only trying to improve the file system efficiency cannot resolve all issue of file systems as technological direction. Moreover, it can impede evolution of file system technology at whole. It is impossible to satisfy end-user's expectations by means of file systems optimization only. New persistent storage technologies can question about file systems necessity at whole without suggestion of revolutionary new file system's approaches. However, file system contains paradigm of information structuring that is very important for end-user as a human being. It needs to distinguish the two classes of tasks: (1) optimization task; (2) task of elaboration a new architecture vision or paradigm. But, frequently, project goal degenerates into optimization task which is meant really elaboration of a new paradigm. End-user expectations are complex and contradictory set of requirements. Only optimization tasks cannot resolve the all current needs of end-user in the file system field. End-user's expectations require resolving tasks of a new architecture vision or paradigm elaboration

Vulnerability Management for an Enterprise Resource Planning System

Enterprise resource planning (ERP) systems are commonly used in technical educational institutions(TEIs). ERP systems should continue providing services to its users irrespective of the level of failure. There could be many types of failures in the ERP systems. There are different types of measures or characteristics that can be defined for ERP systems to handle the levels of failure. Here in this paper, various types of failure levels are identified along with various characteristics which are concerned with those failures. The relation between all these is summarized. The disruptions causing vulnerabilities in TEIs are identified .A vulnerability management cycle has been suggested along with many commercial and open source vulnerability management tools. The paper also highlights the importance of resiliency in ERP systems in TEIs