254 research outputs found

    Polar coding for optical wireless communication

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    List Decoding of Short Codes for Communication over Unknown Fading Channels

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    In this paper, the advantages of list decoding for short packet transmission over fading channels with an unknown state are illustrated. The principle is applied to polar codes (under successive cancellation list decoding) and to general short binary linear block codes (under ordered-statistics decoding). The proposed decoders assume neither a-priori knowledge of the channel coefficients, nor of their statistics. The scheme relies on short pilot fields that are used only to derive an initial channel estimate. The channel estimate is required to be accurate enough to enable a good list construction, i.e., the construction of a list that contains, with high probability, the transmitted codeword. The final decision on the message is obtained by applying a list. This allows one to use very few pilots, thus reducing the the Rayleigh block-fading channel and compared to finite-length performance bounds. The proposed technique provides (in the short block length regime) gains of 1 dB with respect to a traditional pilot-aided transmission scheme

    Low-Complexity Joint Channel Estimation and List Decoding of Short Codes

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    A pilot-assisted transmission (PAT) scheme is proposed for short blocklengths, where the pilots are used only to derive an initial channel estimate for the list construction step. The final decision of the message is obtained by applying a non-coherent decoding metric to the codewords composing the list. This allows one to use very few pilots, thus reducing the channel estimation overhead. The method is applied to an ordered statistics decoder for communication over a Rayleigh block-fading channel. Gains of up to 1.21.2 dB as compared to traditional PAT schemes are demonstrated for short codes with QPSK signaling. The approach can be generalized to other list decoders, e.g., to list decoding of polar codes.Comment: Accepted at the 12th International ITG Conference on Systems, Communications and Coding (SCC 2019), Rostock, German

    Hardware implementation aspects of polar decoders and ultra high-speed LDPC decoders

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    The goal of channel coding is to detect and correct errors that appear during the transmission of information. In the past few decades, channel coding has become an integral part of most communications standards as it improves the energy-efficiency of transceivers manyfold while only requiring a modest investment in terms of the required digital signal processing capabilities. The most commonly used channel codes in modern standards are low-density parity-check (LDPC) codes and Turbo codes, which were the first two types of codes to approach the capacity of several channels while still being practically implementable in hardware. The decoding algorithms for LDPC codes, in particular, are highly parallelizable and suitable for high-throughput applications. A new class of channel codes, called polar codes, was introduced recently. Polar codes have an explicit construction and low-complexity encoding and successive cancellation (SC) decoding algorithms. Moreover, polar codes are provably capacity achieving over a wide range of channels, making them very attractive from a theoretical perspective. Unfortunately, polar codes under standard SC decoding cannot compete with the LDPC and Turbo codes that are used in current standards in terms of their error-correcting performance. For this reason, several improved SC-based decoding algorithms have been introduced. The most prominent SC-based decoding algorithm is the successive cancellation list (SCL) decoding algorithm, which is powerful enough to approach the error-correcting performance of LDPC codes. The original SCL decoding algorithm was described in an arithmetic domain that is not well-suited for hardware implementations and is not clear how an efficient SCL decoder architecture can be implemented. To this end, in this thesis, we re-formulate the SCL decoding algorithm in two distinct arithmetic domains, we describe efficient hardware architectures to implement the resulting SCL decoders, and we compare the decoders with existing LDPC and Turbo decoders in terms of their error-correcting performance and their implementation efficiency. Due to the ongoing technology scaling, the feature sizes of integrated circuits keep shrinking at a remarkable pace. As transistors and memory cells keep shrinking, it becomes increasingly difficult and costly (in terms of both area and power) to ensure that the implemented digital circuits always operate correctly. Thus, manufactured digital signal processing circuits, including channel decoder circuits, may not always operate correctly. Instead of discarding these faulty dies or using costly circuit-level fault mitigation mechanisms, an alternative approach is to try to live with certain malfunctions, provided that the algorithm implemented by the circuit is sufficiently fault-tolerant. In this spirit, in this thesis we examine decoding of polar codes and LDPC codes under the assumption that the memories that are used within the decoders are not fully reliable. We show that, in both cases, there is inherent fault-tolerance and we also propose some methods to reduce the effect of memory faults on the error-correcting performance of the considered decoders

    Polar-Coded OFDM with Index Modulation

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    Polar codes, as the first error-correcting codes with an explicit construction to provably achieve thesymmetric capacity of memoryless channels, which are constructed based on channel polarization, have recently become a primary contender in communication networks for achieving tighter requirements with relatively low complexity. As one of the contributions in this thesis, three modified polar decoding schemes are proposed. These schemes include enhanced versions of successive cancellation-flip (SC-F), belief propagation (BP), and sphere decoding (SD). The proposed SC-F utilizes novel potential incorrect bits selection criteria and stack to improve its error correction performance. Next, to make the decoding performance of BP better, permutation and feedback structure are utilized. Then, in order to reduce the complexity without compromising performance, a SD by using novel decoding strategies according to modified path metric (PM) and radius extension is proposed. Additionally, to solve the problem that BP has redundant iterations, a new stopping criterion based on bit different ratio (BDR) is proposed. According to the simulation results and mathematical proof, all proposed schemes can achieve corresponding performance improvement or complexity reduction compared with existing works. Beside applying polar coding, to achieve a reliable and flexible transmission in a wireless communication system, a modified version of orthogonal frequency division multiplexing (OFDM) modulation based on index modulation, called OFDM-in-phase/quadrature-IM (OFDM-I/Q-IM), is applied. This modulation scheme can simultaneously improve spectral efficiency and bit-error rate (BER) performance with great flexibility in design and implementation. Hence, OFDM-I/Q-IM is considered as a potential candidate in the new generation of cellular networks. As the main contribution in this work, a polar-coded OFDM-I/Q-IM system is proposed. The general design guidelines for overcoming the difficulties associated with the application of polar codes in OFDM-I/Q-IM are presented. In the proposed system, at the transmitter, we employ a random frozen bits appending scheme which not only makes the polar code compatible with OFDM-I/Q-IM but also improves the BER performance of the system. Furthermore, at the receiver, it is shown that the \textit{a posteriori} information for each index provided by the index detector is essential for the iterative decoding of polar codes by the BP algorithm. Simulation results show that the proposed polar-coded OFDM-I/Q-IM system outperforms its OFDM counterpart in terms of BER performance
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