Jitter decomposition in ring oscillators

Abstract — It is important to separate random jitter from de-terministic jitter to quantify their contributions to the total jit-ter. This paper identifies the limitations of the existing method-ologies for jitter decomposition, and develops a new and efficient approach using time lag correlation functions to decompose dif-ferent jitter components. The theory of the approach is developed and it is applied to a ring oscillator simulated in a 0.6-um AMI CMOS process. Results show good agreement between the theory and hspice simulation. I

Oscillator phase noise: a tutorial

Linear time-invariant (LTI) phase noise theories provide important qualitative design insights but are limited in their quantitative predictive power. Part of the difficulty is that device noise undergoes multiple frequency translations to become oscillator phase noise. A quantitative understanding of this process requires abandoning the principle of time invariance assumed in most older theories of phase noise. Fortunately, the noise-to-phase transfer function of oscillators is still linear, despite the existence of the nonlinearities necessary for amplitude stabilization. In addition to providing a quantitative reconciliation between theory and measurement, the time-varying phase noise model presented in this tutorial identifies the importance of symmetry in suppressing the upconversion of 1/f noise into close-in phase noise, and provides an explicit appreciation of cyclostationary effects and AM-PM conversion. These insights allow a reinterpretation of why the Colpitts oscillator exhibits good performance, and suggest new oscillator topologies. Tuned LC and ring oscillator circuit examples are presented to reinforce the theoretical considerations developed. Simulation issues and the accommodation of amplitude noise are considered in appendixes

Calculation of the Performance of Communication Systems from Measured Oscillator Phase Noise

Oscillator phase noise (PN) is one of the major problems that affect the performance of communication systems. In this paper, a direct connection between oscillator measurements, in terms of measured single-side band PN spectrum, and the optimal communication system performance, in terms of the resulting error vector magnitude (EVM) due to PN, is mathematically derived and analyzed. First, a statistical model of the PN, considering the effect of white and colored noise sources, is derived. Then, we utilize this model to derive the modified Bayesian Cramer-Rao bound on PN estimation, and use it to find an EVM bound for the system performance. Based on our analysis, it is found that the influence from different noise regions strongly depends on the communication bandwidth, i.e., the symbol rate. For high symbol rate communication systems, cumulative PN that appears near carrier is of relatively low importance compared to the white PN far from carrier. Our results also show that 1/f^3 noise is more predictable compared to 1/f^2 noise and in a fair comparison it affects the performance less.Comment: Accepted in IEEE Transactions on Circuits and Systems-I: Regular Paper

Power waves formulation of oscillation conditions: avoidance of bifurcation modes in cross-coupled VCO architectures

This paper discusses necessity of power-waves formulation to extend voltage-current oriented approaches based on linear concepts such as admittance/impedance operators and transfer-function representations. Importance of multi-physics methodologies, throughout power-waves formulation, for the analysis and design of crystal oscillators is discussed. Interpretation of bifurcation modes in differential cross-coupled VCO architectures in terms of gyrator-like behavior, is proposed. Impact of amplitude level control (ALC) on large-signal phase noise performances is underlined showing necessity of robust control analysis approach relative to power-energy considerations

Multi-Loop-Ring-Oscillator Design and Analysis for Sub-Micron CMOS

Ring oscillators provide a central role in timing circuits for today?s mobile devices and desktop computers. Increased integration in these devices exacerbates switching noise on the supply, necessitating improved supply resilience. Furthermore, reduced voltage headroom in submicron technologies limits the number of stacked transistors available in a delay cell. Hence, conventional single-loop oscillators offer relatively few design options to achieve desired specifications, such as supply rejection. Existing state-of-the-art supply-rejection- enhancement methods include actively regulating the supply with an LDO, employing a fully differential or current-starved delay cell, using a hi-Z voltage-to-current converter, or compensating/calibrating the delay cell. Multiloop ring oscillators (MROs) offer an additional solution because by employing a more complex ring-connection structure and associated delay cell, the designer obtains an additional degree of freedom to meet the desired specifications. Designing these more complex multiloop structures to start reliably and achieve the desired performance requires a systematic analysis procedure, which we attack on two fronts: (1) a generalized delay-cell viewpoint of the MRO structure to assist in both analysis and circuit layout, and (2) a survey of phase-noise analysis to provide a bank of methods to analyze MRO phase noise. We distill the salient phase-noise-analysis concepts/key equations previously developed to facilitate MRO and other non-conventional oscillator analysis. Furthermore, our proposed analysis framework demonstrates that all these methods boil down to obtaining three things: (1) noise modulation function (NMF), (2) noise transfer function (NTF), and (3) current-controlled-oscillator gain (KICO). As a case study, we detail the design, analysis, and measurement of a proposed multiloop ring oscillator structure that provides improved power-supply isolation (more than 20dB increase in supply rejection over a conventional-oscillator control case fabricated on the same test chip). Applying our general multi-loop-oscillator framework to this proposed MRO circuit leads both to design-oriented expressions for the oscillation frequency and supply rejection as well as to an efficient layout technique facilitating cross-coupling for improved quadrature accuracy and systematic, substantially simplified layout effort

Multi-Loop-Ring-Oscillator Design and Analysis for Sub-Micron CMOS

Ring oscillators provide a central role in timing circuits for today?s mobile devices and desktop computers. Increased integration in these devices exacerbates switching noise on the supply, necessitating improved supply resilience. Furthermore, reduced voltage headroom in submicron technologies limits the number of stacked transistors available in a delay cell. Hence, conventional single-loop oscillators offer relatively few design options to achieve desired specifications, such as supply rejection. Existing state-of-the-art supply-rejection- enhancement methods include actively regulating the supply with an LDO, employing a fully differential or current-starved delay cell, using a hi-Z voltage-to-current converter, or compensating/calibrating the delay cell. Multiloop ring oscillators (MROs) offer an additional solution because by employing a more complex ring-connection structure and associated delay cell, the designer obtains an additional degree of freedom to meet the desired specifications. Designing these more complex multiloop structures to start reliably and achieve the desired performance requires a systematic analysis procedure, which we attack on two fronts: (1) a generalized delay-cell viewpoint of the MRO structure to assist in both analysis and circuit layout, and (2) a survey of phase-noise analysis to provide a bank of methods to analyze MRO phase noise. We distill the salient phase-noise-analysis concepts/key equations previously developed to facilitate MRO and other non-conventional oscillator analysis. Furthermore, our proposed analysis framework demonstrates that all these methods boil down to obtaining three things: (1) noise modulation function (NMF), (2) noise transfer function (NTF), and (3) current-controlled-oscillator gain (KICO). As a case study, we detail the design, analysis, and measurement of a proposed multiloop ring oscillator structure that provides improved power-supply isolation (more than 20dB increase in supply rejection over a conventional-oscillator control case fabricated on the same test chip). Applying our general multi-loop-oscillator framework to this proposed MRO circuit leads both to design-oriented expressions for the oscillation frequency and supply rejection as well as to an efficient layout technique facilitating cross-coupling for improved quadrature accuracy and systematic, substantially simplified layout effort

Digital PLL for ISM applications

In modern transceivers, a low power PLL is a key block. It is known that with the evolution of technology, lower power and high performance circuitry is a challenging demand. In this thesis, a low power PLL is developed in order not to exceed 2mW of total power consumption. It is composed by small area blocks which is one of the main demands. The blocks that compose the PLL are widely abridged and the final solution is shown, showing why it is employed. The VCO block is a Current-Starved Ring Oscillator with a frequency range from 400MHz to 1.5GHz, with a 300μW to approximately 660μW power consumption. The divider is composed by six TSPC D Flip-Flop in series, forming a divide-by-64 divider. The Phase-Detector is a Dual D Flip-Flop detector with a charge pump. The PLL has less than a 2us lock time and presents a output oscillation of 1GHz, as expected. It also has a total power consumption of 1.3mW, therefore fulfilling all the specifications. The main contributions of this thesis are that this PLL can be applied in ISM applications due to its covering frequency range and low cost 130nm CMOS technology

Determination of phase noise spectra in optoelectronic microwave oscillators: a Langevin approach

We introduce a stochastic model for the determination of phase noise in optoelectronic oscillators. After a short overview of the main results for the phase diffusion approach in autonomous oscillators, an extension is proposed for the case of optoelectronic oscillators where the microwave is a limit-cycle originated from a bifurcation induced by nonlinearity and time-delay. This Langevin approach based on stochastic calculus is also successfully confronted with experimental measurements.Comment: 18 pages, 7 figures, 11 references. Submitted to IEEE J. of Quantum Electronics, May 200