Synthesis of Stochastic Flow Networks

A stochastic flow network is a directed graph with incoming edges (inputs) and outgoing edges (outputs), tokens enter through the input edges, travel stochastically in the network, and can exit the network through the output edges. Each node in the network is a splitter, namely, a token can enter a node through an incoming edge and exit on one of the output edges according to a predefined probability distribution. Stochastic flow networks can be easily implemented by DNA-based chemical reactions, with promising applications in molecular computing and stochastic computing. In this paper, we address a fundamental synthesis question: Given a finite set of possible splitters and an arbitrary rational probability distribution, design a stochastic flow network, such that every token that enters the input edge will exit the outputs with the prescribed probability distribution. The problem of probability transformation dates back to von Neumann's 1951 work and was followed, among others, by Knuth and Yao in 1976. Most existing works have been focusing on the "simulation" of target distributions. In this paper, we design optimal-sized stochastic flow networks for "synthesizing" target distributions. It shows that when each splitter has two outgoing edges and is unbiased, an arbitrary rational probability \frac{a}{b} with a\leq b\leq 2^n can be realized by a stochastic flow network of size n that is optimal. Compared to the other stochastic systems, feedback (cycles in networks) strongly improves the expressibility of stochastic flow networks.Comment: 2 columns, 15 page

Fast design optimization of UWB antenna with WLAN Band-Notch

In this paper, a methodology for rapid design optimization of an ultra-wideband ( UWB) monopole antenna with a lower WLAN band-notch is presented. The band-notch is realized using an open loop resonator implemented in the radiation patch of the antenna. Design optimization is a two stage process, with the first stage focused on the design of the antenna itself, and the second stage aiming at identification of the appropriate dimensions of the resonator with the purpose of allocating the band-notch in the desired frequency range. Both optimization stages are realized using surrogate-based optimization involving variable-fidelity electromagnetic ( EM) simulation models as well as an additive response correction ( first stage), and sequential approximate optimization ( second stage). The final antenna design is obtained at the CPU cost corresponding to only 23 high-fidelity EM antenna simulations

Dissipative Quantum Dynamics and Optimal Control using Iterative Time Ordering: An Application to Superconducting Qubits

We combine a quantum dynamical propagator that explicitly accounts for quantum mechanical time ordering with optimal control theory. After analyzing its performance with a simple model, we apply it to a superconducting circuit under so-called Pythagorean control. Breakdown of the rotating-wave approximation is the main source of the very strong time-dependence in this example. While the propagator that accounts for the time ordering in an iterative fashion proves its numerical efficiency for the dynamics of the superconducting circuit, its performance when combined with optimal control turns out to be rather sensitive to the strength of the time-dependence. We discuss the kind of quantum gate operations that the superconducting circuit can implement including their performance bounds in terms of fidelity and speed.Comment: 16 pages, 11 figure

Synthesis of Clock Trees with Useful Skew based on Sparse-Graph Algorithms

Computer-aided design (CAD) for very large scale integration (VLSI) involve

Reusing Logic Masking to Facilitate Hardware Trojan Detection

Hardware Trojan (HT) and Integrated Circuit (IC)/ Intellectual Property (IP) piracy are important threats which may happen in untrusted fabrication foundries. Modifying structurally the ICs/IPs design to counter the HT threats has been proposed, and it is known as Design-For-Hardware-Trust (DFHT). DFHT methods are used in order to facilitate HT detection methods. In addition, logic masking methods modify the IPs/ICs design to harden them against the IP/IC piracy. These methods modify a circuit such that it does not work correctly without applying the correct key. In this paper, we propose DFHT methods leveraging logic masking approach