A survey of carbon nanotube interconnects for energy efficient integrated circuits

This article is a review of the state-of-art carbon nanotube interconnects for Silicon application with respect to the recent literature. Amongst all the research on carbon nanotube interconnects, those discussed here cover 1) challenges with current copper interconnects, 2) process & growth of carbon nanotube interconnects compatible with back-end-of-line integration, and 3) modeling and simulation for circuit-level benchmarking and performance prediction. The focus is on the evolution of carbon nanotube interconnects from the process, theoretical modeling, and experimental characterization to on-chip interconnect applications. We provide an overview of the current advancements on carbon nanotube interconnects and also regarding the prospects for designing energy efficient integrated circuits. Each selected category is presented in an accessible manner aiming to serve as a survey and informative cornerstone on carbon nanotube interconnects relevant to students and scientists belonging to a range of fields from physics, processing to circuit design

Atoms-to-Circuits Simulation Investigation of CNT Interconnects for Next Generation CMOS Technology

In this study, we suggest a hierarchical model to investigate the electrical performance of carbon nanotube (CNT)- based interconnects. From the density functional theory, we have obtained important physical parameters, which are used in TCAD simulators to obtain the RC netlists. We then use these RC netlists for the circuit-level simulations to optimize interconnect design in VLSI. Also, we have compared various CNT-based interconnects such as single-walled CNTs, multi-walled CNTs, doped CNTs, and Cu-CNT composites in terms of conductivity, ring oscillator delay, and propagation time delay

DC and radio-frequency transmission characteristics of double-walled carbon nanotubes-based ink

In this paper, double-walled carbon nanotubes (DWNTs) network layers were patterned using inkjet transfer printing. The remarkable conductive characteristics of carbon nanotubes (CNTs) are considered as promising candidates for transmission line as well as microelectronic interconnects of an arbitrary pattern. In this work, the DWNTs were prepared by the catalytic chemical vapor deposition process, oxidized and dispersed in ethylene glycol solution. The DWNTs networks were deposited between electrodes contact and then characterized at DC through current-voltage measurements, low frequency, and high frequency by scattering parameters measurements from 40 MHz up to 40 GHz through a vector network analyzer. By varying the number of inkjet overwrites, the results confirm that the DC resistance of DWNTs networks can be varied according to their number and that furthermore the networks preserve ohmic characteristics up to 100 MHz. The microwave transmission parameters were obtained from the measured S-parameter data. An algorithm is developed to calculate the propagation constant "γ", attenuation constant "α" in order to show the frequency dependence of the equivalent resistance of DWNTs networks, which decreases with increasing frequency

Fundamental Characterization of Low Dimensional Carbon Nanomaterials for 3D Electronics Packaging

Transistor miniaturization has over the last half century paved the way for higher value electronics every year along an exponential pace known as \u27Moore\u27s law\u27. Now, as the industry is reaching transistor features that no longer makes economic sense, this way of developing integrated circuits (ICs) is coming to its definitive end. As a solution to this problem, the industry is moving toward higher hanging fruits that can enable larger sets of functionalities and ensuring a sustained performance increase to continue delivering more cost-effective ICs every product cycle. These design strategies beyond Moore\u27s law put emphasis on 3D stacking and heterogeneous integration, which if implemented correctly, will deliver a continued development of ICs for a foreseeable future. However, this way of building semiconductor systems does bring new issues to the table as this generation of devices will place additional demands on materials to be successful. The international roadmap of devices and systems (IRDS) highlights the need for improved materials to remove bottlenecks in contemporary as well as future systems in terms of thermal dissipation and interconnect performance. For this very purpose, low dimensional carbon nanomaterials such as graphene and carbon nanotubes (CNTs) are suggested as potential candidates due to their superior thermal, electrical and mechanical properties. Therefore, a successful implementation of these materials will ensure a continued performance to cost development of IC devices.This thesis presents a research study on some fundamental materials growth and reliability aspects of low dimensional carbon based thermal interface materials (TIMs) and interconnects for electronics packaging applications. Novel TIMs and interconnects based on CNT arrays and graphene are fabricated and investigated for their thermal resistance contributions as well electrical performance. The materials are studied and optimized with the support of chemical and structural characterization. Furthermore, a reliability study was performed which found delamination issues in CNT array TIMs due to high strains from thermal expansion mismatches. This study concludes that CNT length is an important factor when designing CNT based systems and the results show that by further interface engineering, reliability can be substantially improved with maintained thermal dissipation and electrical performance. Additionally, a heat treatment study was made that enables improvement of the bulk crystallinity of the materials which will enable even better performance in future applications

Brazing techniques for the fabrication of biocompatible carbon-based electronic devices

Prototype electronic devices have been critical to the discovery and demonstration of the unique properties of new materials, including composites based on carbon nanotubes (CNT) and graphene. However, these devices are not typically constructed with durability or biocompatibility in mind, relying on conductive polymeric adhesives, mechanical clamps or crimps, or solders for electrical connections. In this paper, two key metallization techniques are presented that employ commercially-available brazing alloys to fabricate electronic devices based on diamond and carbonaceous wires. Investigation of the carbon - alloy interfacial interactions was utilized to guide device fabrication. The interplay of both chemical ( adhesive ) and mechanical ( cohesive ) forces at the interface of different forms of carbon was exploited to fabricate either freestanding or substrate-fixed carbonaceous electronic devices. Elemental analysis in conjunction with scanning electron microscopy of the carbon - alloy interface revealed the chemical nature of the Ag alloy bond and the mechanical nature of the Au alloy bond. Electrical characterization revealed the non-rectifying nature of the carbon - Au alloy interconnects. Finally, electronic devices were fabricated, including a Au circuit structure embedded in a polycrystalline diamond substrate

Carbon nanotubes on graphene: Electrical and interfacial properties

An integrated circuit (IC) consists of copper (Cu) and tungsten (W) interconnects to facilitate conduction among its components such as transistors, resistors, and capacitors. As the minimum feature size in IC technology continues to scale downward into the sub-20 nm regime, interconnects are faced with performance and reliability challenges arising from increased resistance and electromigration, respectively [1]. To partially mitigate such challenges, our project aims at studying a structure as a potential replacement for Cu and W, formed by growing carbon nanotubes (CNTs) directly onto graphene, and investigating the resulting electrical and interfacial properties. Various CNT/Graphene structures are fabricated using sputtered iron (Fe), cobalt (Co), or nickel (Ni) catalyst films and subsequent thermal chemical vapor deposition (CVD) or plasma-enhanced chemical vapor deposition (PECVD) processes for CNT growth. The objective of this research is to assess the viability of CNTs directly grown on graphene as a functional alternative to Cu and W interconnects in integrated circuits. Using Co as a catalyst for CNT growth with a thermal CVD process, we have succeeded in creating a conductive all-carbon 3D interconnect structure

Effect of electric field polarization and temperature on the effective permittivity and conductivity of porous anodic aluminium oxide membranes

Porous insulators offer new opportunities for the controlled guest–host synthesis of nanowires for future integrated circuits characterized by low propagation delay, crosstalk and power consumption. We propose a method to estimate the effect of the electric field polarization and temperature on the electrical properties of different types of synthesized porous anodic aluminium oxide membranes. It results that the effective permittivity along the pore axis is generally 20% higher than the one in the orthogonal direction. The type of solution and the voltage level applied during anodization are the main parameters affecting the AAO templates characteristics, i.e. their porosity and chemical content. The values of permittivity of the final material, are typically in the range 2.6–3.2 for large pore diameter membranes including phosphorus element and having a low water content, and in the range 3.5–4 for the ones with smaller pores, and showing sulphur element incorporation. Moreover, the dc conductivity of the different membranes appears to be correlated to the pore density

Low-Dimensional Materials for Disruptive Microwave Antennas Design

This chapter is devoted to a complete analysis of remarkable electromagnetic properties of nanomaterials suitable for antenna design miniaturization. After a review of state of the art mesoscopic scale modeling tools and characterization techniques in microwave domain, new approaches based on wideband material parameters identification (complex permittivity and conductivity) will be described from impedance equivalence formulation achievement by de-embedding techniques applicable in integrated technology or in free space. A focus on performances of 1D materials such as vertically aligned multi-wall carbon nanotube (VA-MWCNT) bundles, from theory to technology, will be presented as a disruptive demonstration for defense and civil applications as in radar systems

Fabrication and electrical integration of robust carbon nanotube micropillars by self-directed elastocapillary densification

Vertically-aligned carbon nanotube (CNT) "forest" microstructures fabricated by chemical vapor deposition (CVD) using patterned catalyst films typically have a low CNT density per unit area. As a result, CNT forests have poor bulk properties and are too fragile for integration with microfabrication processing. We introduce a new self-directed capillary densification method where a liquid is controllably condensed onto and evaporated from CNT forests. Compared to prior approaches, where the substrate with CNTs is immersed in a liquid, our condensation approach gives significantly more uniform structures and enables precise control of the CNT packing density and pillar cross-sectional shape. We present a set of design rules and parametric studies of CNT micropillar densification by this method, and show that self-directed capillary densification enhances the Young's modulus and electrical conductivity of CNT micropillars by more than three orders of magnitude. Owing to the outstanding properties of CNTs, this scalable process will be useful for the integration of CNTs as functional material in microfabricated devices for mechanical, electrical, thermal, and biomedical applications