A Scalable 6-to-18 GHz Concurrent Dual-Band Quad-Beam Phased-Array Receiver in CMOS

This paper reports a 6-to-18 GHz integrated phased- array receiver implemented in 130-nm CMOS. The receiver is easily scalable to build a very large-scale phased-array system. It concurrently forms four independent beams at two different frequencies from 6 to 18 GHz. The nominal conversion gain of the receiver ranges from 16 to 24 dB over the entire band while the worst-case cross-band and cross-polarization rejections are achieved 48 dB and 63 dB, respectively. Phase shifting is performed in the LO path by a digital phase rotator with the worst-case RMS phase error and amplitude variation of 0.5° and 0.4 dB, respectively, over the entire band. A four-element phased-array receiver system is implemented based on four receiver chips. The measured array patterns agree well with the theoretical ones with a peak-to-null ratio of over 21.5 dB

A 90 nm CMOS 16 Gb/s Transceiver for Optical Interconnects

Interconnect architectures which leverage high-bandwidth optical channels offer a promising solution to address the increasing chip-to-chip I/O bandwidth demands. This paper describes a dense, high-speed, and low-power CMOS optical interconnect transceiver architecture. Vertical-cavity surface-emitting laser (VCSEL) data rate is extended for a given average current and corresponding reliability level with a four-tap current summing FIR transmitter. A low-voltage integrating and double-sampling optical receiver front-end provides adequate sensitivity in a power efficient manner by avoiding linear high-gain elements common in conventional transimpedance-amplifier (TIA) receivers. Clock recovery is performed with a dual-loop architecture which employs baud-rate phase detection and feedback interpolation to achieve reduced power consumption, while high-precision phase spacing is ensured at both the transmitter and receiver through adjustable delay clock buffers. A prototype chip fabricated in 1 V 90 nm CMOS achieves 16 Gb/s operation while consuming 129 mW and occupying 0.105 mm^2

A Wideband 77-GHz, 17.5-dBm Fully Integrated Power Amplifier in Silicon

A 77-GHz, +17.5 dBm power amplifier (PA) with fully integrated 50-Ω input and output matching and fabricated in a 0.12-µm SiGe BiCMOS process is presented. The PA achieves a peak power gain of 17 dB and a maximum single-ended output power of 17.5 dBm with 12.8% of power-added efficiency (PAE). It has a 3-dB bandwidth of 15 GHz and draws 165 mA from a 1.8-V supply. Conductor-backed coplanar waveguide (CBCPW) is used as the transmission line structure resulting in large isolation between adjacent lines, enabling integration of the PA in an area of 0.6 mm^2. By using a separate image-rejection filter incorporated before the PA, the rejection at IF frequency of 25 GHz is improved by 35 dB, helping to keep the PA design wideband

A Fully Integrated 24-GHz Eight-Element Phased-Array Receiver in Silicon

This paper reports the first fully integrated 24-GHz eight-element phased-array receiver in a SiGe BiCMOS technology. The receiver utilizes a heterodyne topology and the signal combining is performed at an IF of 4.8 GHz. The phase-shifting with 4 bits of resolution is realized at the LO port of the first down-conversion mixer. A ring LC voltage-controlled oscillator (VCO) generates 16 different phases of the LO. An integrated 19.2-GHz frequency synthesizer locks the VCO frequency to a 75-MHz external reference. Each signal path achieves a gain of 43 dB, a noise figure of 7.4 dB, and an IIP3 of -11 dBm. The eight-path array achieves an array gain of 61 dB and a peak-to-null ratio of 20 dB and improves the signal-to-noise ratio at the output by 9 dB

Microwave Characteristics of an Independently Biased 3-stack InGaP/GaAs HBT Configuration

This paper investigates various important microwave characteristics of an independently biased 3-stack InGaP/GaAs heterojunction bipolar transistor (HBT) monolithic microwave integrated circuit (MMIC) chip at both small-signal and large-signal operation. By taking the advantage of the independently biased functionality, bias condition for individual transistor can be adjusted flexibly, resulting in the ability of independent control for both small-signal and large-signal performances. It was found that at small-signal operation stability and isolation characteristics of the proposed configuration can be significantly improved by controlling bias condition of the second-stage and the third-stage transistors while at large-signal operation its linearity and power gain can be improved through controlling the bias condition of the first-stage and the third-stage transistors. To demonstrate the benefits of using such an independently biased configuration, a measured optimum large-signal performance at an operation frequency of 1.6 GHz under an optimum bias condition for the high gain, low distortion were obtained as: PAE = 23.5 %, Pout = 12 dBm; Gain = 32.6 dB at IMD3 = -35 dBc. Moreover, to demonstrate the superior advantage of the proposed configuration, its small-signal and large-signal performance were also compared to that of a single stage common-emitter, a conventional 2-stack, an independently biased 2-stack and a conventional 3-stack configuration. The compared results showed that the independently biased 3-stack is the best candidate among the configurations for various wireless communications applications

Digital Suppression of EMI-Induced Errors in a Baseband Acquisition Front-End including Off-the-Shelf, EMI-Sensitive Operational Amplifiers

In this paper, the susceptibility to Electromagnetic Interference (EMI) of an analog signal acquisition front-end (AFE) due to EMI distortion in opamp-based pre-conditioning amplifiers is addressed. More specifically, the possibility to correct EMI-induced errors in the digital domain by post-processing the acquired digital waveforms is discussed and experimentally demonstrated for the first time with reference to an AFE based on EMI-sensitive, off-the-shelf operational amplifiers mounted on a specific EMI test PCB. Extensive experimental characterization in the presence of continuous wave and amplitude modulated EMI reveals the superior immunity to EMI of the proposed AFE and the robustness of the approach