Crosstalk and Signal Integrity in Ring Resonator Based Optical Add/Drop Multiplexers for Wavelength-Division-Multiplexing Networks

With 400 Gbps Ethernet being developed at the time of writing this thesis, all-optical networks are a solution to the increased bandwidth requirements of data communication allowing architectures to become increasingly integrated. High density integration of optical components leads to potential ‘Optical/Photonic’ electromagnetic compatibility (EMC) and signal integrity (SI) issues due to the close proximity of optical components and waveguides. Optical EMC issues are due to backscatter, crosstalk, stray light, and substrate modes. This thesis has focused on the crosstalk in Optical Add/Drop Multiplexers (OADMs) as an EMC problem. The main research question is: “How can signal integrity be improved and crosstalk effects mitigated in small-sized OADMs in order to enhance the optical EMC in all-optical networks and contribute to the increase in integration scalability?” To answer this question, increasing the crosstalk suppression bandwidth rather than maximizing the crosstalk suppression ratio is proposed in ring resonator based OADMs. Ring resonators have a small ‘real estate’ requirement and are, therefore, potentially useful for large scale integrated optical systems. A number of approaches such as over-coupled rings, vertically-coupled rings and rings with random and periodic roughness are adopted to effectively reduce the crosstalk between 10 Gbps modulated channels in OADMs. An electromagnetic simulation-driven optimization technique is proposed and used to optimize filter performance of vertically coupled single ring OADMs. A novel approach to analyse and exploit semi-periodic sidewall roughness in silicon waveguides is proposed. Grating-assisted ring resonator design is presented and optimized to increase the crosstalk suppression bandwidth

Circuit design and analysis for on-FPGA communication systems

On-chip communication system has emerged as a prominently important subject in Very-Large- Scale-Integration (VLSI) design, as the trend of technology scaling favours logics more than interconnects. Interconnects often dictates the system performance, and, therefore, research for new methodologies and system architectures that deliver high-performance communication services across the chip is mandatory. The interconnect challenge is exacerbated in Field-Programmable Gate Array (FPGA), as a type of ASIC where the hardware can be programmed post-fabrication. Communication across an FPGA will be deteriorating as a result of interconnect scaling. The programmable fabrics, switches and the specific routing architecture also introduce additional latency and bandwidth degradation further hindering intra-chip communication performance. Past research efforts mainly focused on optimizing logic elements and functional units in FPGAs. Communication with programmable interconnect received little attention and is inadequately understood. This thesis is among the first to research on-chip communication systems that are built on top of programmable fabrics and proposes methodologies to maximize the interconnect throughput performance. There are three major contributions in this thesis: (i) an analysis of on-chip interconnect fringing, which degrades the bandwidth of communication channels due to routing congestions in reconfigurable architectures; (ii) a new analogue wave signalling scheme that significantly improves the interconnect throughput by exploiting the fundamental electrical characteristics of the reconfigurable interconnect structures. This new scheme can potentially mitigate the interconnect scaling challenges. (iii) a novel Dynamic Programming (DP)-network to provide adaptive routing in network-on-chip (NoC) systems. The DP-network architecture performs runtime optimization for route planning and dynamic routing which, effectively utilizes the in-silicon bandwidth. This thesis explores a new horizon in reconfigurable system design, in which new methodologies and concepts are proposed to enhance the on-FPGA communication throughput performance that is of vital importance in new technology processes

Firmware design of a portable medical device to measure the quadriceps muscle group after a total knee arthroplasty by EMG, LBIA and clinical score methods

El objetivo de este proyecto es el diseño del firmware de un dispositivo médico portátil para mediciones de EMG y LBIA, que se utilizará para la evaluación de pacientes de artroplastia total de rodilla, para estudiar la progresión de diferentes prótesis de rodilla (Medial-Pivot y Ultra-Congruente). En la tesis, se expone el conocimiento actual de los estudios y aplicaciones de EMG y LBIA, junto con los dispositivos comerciales utilizados actualmente. Además, se han estudiado e implementado las diferentes técnicas de filtrado y procesamiento digital para señales de EMG y LBIAs. Adicionalmente, se ha realizado un estudio estadístico preliminar con datos LBIA de 12 pacientes de artroplastia total de rodilla. El diseño del firmware de esta tesis incluye: los procesos de adquisición de datos con el uso de diferentes ADCs (Conversor Analógico a Digital) (de la propia placa y externos, utilizando la interfaz SPI) y un DAC (Conversor Digital a Analógico), el correspondiente procesamiento de la señal y la extracción de sus características, la comunicación con un dispositivo externo utilizando un módulo BLE externo con interfaz UART, el proceso de encriptación de los datos médicos, la funcionalidad de manejo de errores y la aproximación del nivel de batería. En esta tesis, todos los flujos de trabajo de los procesos se exponen y explican mediante diagramas de flujo, mientras que se justifica cada cálculo y configuración. Además, todo el código correspondiente se ha programado en lenguaje C y se expone en los anexos. También se ha revisado la normativa aplicable y se ha analizado tanto el impacto ambiental como el coste económico del producto. Por último, se proponen mejoras para futuros trabajos.The aim of this project is the firmware design for a portable medical device for EMG and LBIA measurements which will be used for the assessment of total knee arthroplasty patients to study the progression of different knee prostheses (Medial-Pivot and Ultra-Congruent). For its realization, the state of the art of the EMG and LBIA studies and applications are exposed, along with the currently used medical devices. In addition, the different digital filtering and processing techniques for these studies have been studied and implemented. Furthermore, a preliminary statistical study has been performed with LBIA data from 12 patients with total knee arthroplasty. The firmware design of this thesis includes: the acquiring data processes with the use of different ADCs (from the actual board and external, using the SPI interface) and a DAC, the corresponding signal processing and feature abstraction, the communication with an external device using an external BLE module with UART interface, the medical data encrypting process, the error handling functionality, and the battery level approximation. In this work, all the process workflows are exposed and explained using flowcharts, while every calculation and configuration is justified. In addition, all the corresponding code has been programmed using C language and exposed in the Annexes. Moreover, the applicable regulation has been reviewed, and both the environmental impact and economic cost of the product have been analyzed. Finally, improvements are proposed for future work.L'objectiu d'aquest projecte és el disseny del microprogramari d'un dispositiu mèdic portàtil per a mesures d'EMG i LBIA. L’aparell mèdic s'utilitzarà per a l'avaluació de pacients d'artroplàstia total de genoll per estudiar la progressió de dues pròtesis de genoll (Medial-Pivot i Ultra- Congruent). En el treball, s'exposa el coneixement actual dels estudis i aplicacions d'EMG i LBIA, juntament amb els dispositius comercials utilitzats actualment. A més, s'han estudiat i implementat les diferents tècniques de filtrat i processament digital dels senyals de EMG i LBIA. Addicionalment, s'ha fet un estudi estadístic preliminar amb dades de LBIA de 12 pacients amb artroplàstia total de genoll. El disseny del microprogramari d'aquesta tesi inclou: els processos d'adquisició de dades fent ús de diferents ADCs (de la pròpia placa i externs, utilitzant la interfície SPI) i un DAC, el processament dels senyals i l'abstracció de les seves característiques, la comunicació amb un dispositiu extern utilitzant un mòdul BLE extern amb interfície UART, el procés d'encriptació de les dades mèdiques, la funcionalitat de l’avaluació d'errors i l'aproximació del nivell de bateria. En aquest treball, totes les funcionalitats del dispositiu s'exposen i s'expliquen mitjançant diagrames de flux i es justifiquen els càlculs i configuracions corresponents. Tot el codi desenvolupat s'ha programat en llenguatge C i s'exposa als annexos. A més, s'ha revisat la normativa aplicable i s'ha analitzat tant l'impacte ambiental com el cost econòmic de l’aparell. Finalment, es proposen millores per a futurs desenvolupaments

Management and Control of Scalable and Resilient Next-Generation Optical Networks

Two research topics in next-generation optical networks with wavelength-division multiplexing (WDM) technologies were investigated: (1) scalability of network management and control, and (2) resilience/reliability of networks upon faults and attacks. In scalable network management, the scalability of management information for inter-domain light-path assessment was studied. The light-path assessment was formulated as a decision problem based on decision theory and probabilistic graphical models. It was found that partial information available can provide the desired performance, i.e., a small percentage of erroneous decisions can be traded off to achieve a large saving in the amount of management information. In network resilience under malicious attacks, the resilience of all-optical networks under in-band crosstalk attacks was investigated with probabilistic graphical models. Graphical models provide an explicit view of the spatial dependencies in attack propagation, as well as computationally efficient approaches, e.g., sum-product algorithm, for studying network resilience. With the proposed cross-layer model of attack propagation, key factors that affect the resilience of the network from the physical layer and the network layer were identified. In addition, analytical results on network resilience were obtained for typical topologies including ring, star, and mesh-torus networks. In network performance upon failures, traffic-based network reliability was systematically studied. First a uniform deterministic traffic at the network layer was adopted to analyze the impacts of network topology, failure dependency, and failure protection on network reliability. Then a random network layer traffic model with Poisson arrivals was applied to further investigate the effect of network layer traffic distributions on network reliability. Finally, asymptotic results of network reliability metrics with respect to arrival rate were obtained for typical network topologies under heavy load regime. The main contributions of the thesis include: (1) fundamental understandings of scalable management and resilience of next-generation optical networks with WDM technologies; and (2) the innovative application of probabilistic graphical models, an emerging approach in machine learning, to the research of communication networks.Ph.D.Committee Chair: Ji, Chuanyi; Committee Member: Chang, Gee-Kung; Committee Member: McLaughlin, Steven; Committee Member: Ralph, Stephen; Committee Member: Zegura, Elle

Application of advanced on-board processing concepts to future satellite communications systems

An initial definition of on-board processing requirements for an advanced satellite communications system to service domestic markets in the 1990's is presented. An exemplar system architecture with both RF on-board switching and demodulation/remodulation baseband processing was used to identify important issues related to system implementation, cost, and technology development

Kepler Archive Manual

A description of Kepler, its design, performance and operational constraints may be found in the Kepler Instrument Handbook (KIH, Van Cleve Caldwell 2016). A description of Kepler calibration and data processing is described in the Kepler Data Processing Handbook (KDPH, Jenkins et al. 2016; Fanelli et al. 2011). Science users should also consult the special ApJ Letters devoted to early Kepler results and mission design (April 2010, ApJL, Vol. 713 L79-L207). Additional technical details regarding the data processing and data qualities can be found in the Kepler Data Characteristics Handbook (KDCH, Christiansen et al. 2013) and the Data Release Notes (DRN). This archive manual specifically documents the file formats, as they exist for the last data release of Kepler, Data Release 25(KSCI-19065-002). The earlier versions of the archive manual and data release notes act as documentation for the earlier versions of the data files

Discrete Wavelet Transforms

The discrete wavelet transform (DWT) algorithms have a firm position in processing of signals in several areas of research and industry. As DWT provides both octave-scale frequency and spatial timing of the analyzed signal, it is constantly used to solve and treat more and more advanced problems. The present book: Discrete Wavelet Transforms: Algorithms and Applications reviews the recent progress in discrete wavelet transform algorithms and applications. The book covers a wide range of methods (e.g. lifting, shift invariance, multi-scale analysis) for constructing DWTs. The book chapters are organized into four major parts. Part I describes the progress in hardware implementations of the DWT algorithms. Applications include multitone modulation for ADSL and equalization techniques, a scalable architecture for FPGA-implementation, lifting based algorithm for VLSI implementation, comparison between DWT and FFT based OFDM and modified SPIHT codec. Part II addresses image processing algorithms such as multiresolution approach for edge detection, low bit rate image compression, low complexity implementation of CQF wavelets and compression of multi-component images. Part III focuses watermaking DWT algorithms. Finally, Part IV describes shift invariant DWTs, DC lossless property, DWT based analysis and estimation of colored noise and an application of the wavelet Galerkin method. The chapters of the present book consist of both tutorial and highly advanced material. Therefore, the book is intended to be a reference text for graduate students and researchers to obtain state-of-the-art knowledge on specific applications

Exploration and Design of Power-Efficient Networked Many-Core Systems

Multiprocessing is a promising solution to meet the requirements of near future applications. To get full benefit from parallel processing, a manycore system needs efficient, on-chip communication architecture. Networkon- Chip (NoC) is a general purpose communication concept that offers highthroughput, reduced power consumption, and keeps complexity in check by a regular composition of basic building blocks. This thesis presents power efficient communication approaches for networked many-core systems. We address a range of issues being important for designing power-efficient manycore systems at two different levels: the network-level and the router-level. From the network-level point of view, exploiting state-of-the-art concepts such as Globally Asynchronous Locally Synchronous (GALS), Voltage/ Frequency Island (VFI), and 3D Networks-on-Chip approaches may be a solution to the excessive power consumption demanded by today’s and future many-core systems. To this end, a low-cost 3D NoC architecture, based on high-speed GALS-based vertical channels, is proposed to mitigate high peak temperatures, power densities, and area footprints of vertical interconnects in 3D ICs. To further exploit the beneficial feature of a negligible inter-layer distance of 3D ICs, we propose a novel hybridization scheme for inter-layer communication. In addition, an efficient adaptive routing algorithm is presented which enables congestion-aware and reliable communication for the hybridized NoC architecture. An integrated monitoring and management platform on top of this architecture is also developed in order to implement more scalable power optimization techniques. From the router-level perspective, four design styles for implementing power-efficient reconfigurable interfaces in VFI-based NoC systems are proposed. To enhance the utilization of virtual channel buffers and to manage their power consumption, a partial virtual channel sharing method for NoC routers is devised and implemented. Extensive experiments with synthetic and real benchmarks show significant power savings and mitigated hotspots with similar performance compared to latest NoC architectures. The thesis concludes that careful codesigned elements from different network levels enable considerable power savings for many-core systems.Siirretty Doriast