Wearable, low-power CMOS ISFETs and compensation circuits for on-body sweat analysis

Complementary metal-oxide-semiconductor (CMOS) technology has been a key driver behind the trend of reduced power consumption and increased integration of electronics in consumer devices and sensors. In the late 1990s, the integration of ion-sensitive field-effect transistors (ISFETs) into unmodified CMOS helped to create advancements in lab-on-chip technology through highly parallelised and low-cost designs. Using CMOS techniques to reduce power and size in chemical sensing applications has already aided the realisation of portable, battery-powered analysis platforms, however the possibility of integrating these sensors into wearable devices has until recently remained unexplored. This thesis investigates the use of CMOS ISFETs as wearable electrochemical sensors, specifically for on-body sweat analysis. The investigation begins by evaluating the ISFET sensor for wearable applications, identifying the key advantages and challenges that arise in this pursuit. A key requirement for wearable devices is a low power consumption, to enable a suitable operational life and small form factor. From this perspective, ISFETs are investigated for low power operation, to determine the limitations when trying to push down the consumption of individual sensors. Batteryless ISFET operation is explored through the design and implementation of a 0.35 \si{\micro\metre} CMOS ISFET sensing array, operating in weak-inversion and consuming 6 \si{\micro\watt}. Using this application-specific integrated circuit (ASIC), the first ISFET array powered by body heat is demonstrated and the feasibility of using near-field communication (NFC) for wireless powering and data transfer is shown. The thesis also presents circuits and systems for combatting three key non-ideal effects experienced by CMOS ISFETs, namely temperature variation, threshold voltage offset and drift. An improvement in temperature sensitivity by a factor of three compared to an uncompensated design is shown through measured results, while adding less than 70 \si{\nano\watt} to the design. A method of automatically biasing the sensors is presented and an approach to using spatial separation of sensors in arrays in applications with flowing fluids is proposed for distinguishing between signal and sensor drift. A wearable device using the ISFET-based system is designed and tested with both artificial and natural sweat, identifying the remaining challenges that exist with both the sensors themselves and accompanying components such as microfluidics and reference electrode. A new ASIC is designed based on the discoveries of this work and aimed at detecting multiple analytes on a single chip. %Removed In the latter half of the thesis, Finally, the future directions of wearable electrochemical sensors is discussed with a look towards embedded machine learning to aid the interpretation of complex fluid with time-domain sensor arrays. The contributions of this thesis aim to form a foundation for the use of ISFETs in wearable devices to enable non-invasive physiological monitoring.Open Acces

A differential pressure instrument with wireless telemetry for in-situ measurement of fluid flow across sediment-water boundaries

© 2009 The Authors. This article is distributed under the terms of the Creative Commons Attribution (3.0) License. The definitive version was published in Sensors 9 (2009): 404-429, doi:10.3390/s90100404.An instrument has been built to carry out continuous in-situ measurement of small differences in water pressure, conductivity and temperature, in natural surface water and groundwater systems. A low-cost data telemetry system provides data on shore in real time if desired. The immediate purpose of measurements by this device is to continuously infer fluxes of water across the sediment-water interface in a complex estuarine system; however, direct application to assessment of sediment-water fluxes in rivers, lakes, and other systems is also possible. Key objectives of the design include both low cost, and accuracy of the order of ±0.5 mm H2O in measured head difference between the instrument’s two pressure ports. These objectives have been met, although a revision to the design of one component was found to be necessary. Deployments of up to nine months, and wireless range in excess of 300 m have been demonstrated

Concepts for Short Range Millimeter-wave Miniaturized Radar Systems with Built-in Self-Test

This work explores short-range millimeter wave radar systems, with emphasis on miniaturization and overall system cost reduction. The designing and implementation processes, starting from the system level design considerations and characterization of the individual components to final implementation of the proposed architecture are described briefly. Several D-band radar systems are developed and their functionality and performances are demonstrated

Floating-Gate Design and Linearization for Reconfigurable Analog Signal Processing

Analog and mixed-signal integrated circuits have found a place in modern electronics design as a viable alternative to digital pre-processing. With metrics that boast high accuracy and low power consumption, analog pre-processing has opened the door to low-power state-monitoring systems when it is utilized in place of a power-hungry digital signal-processing stage. However, the complicated design process required by analog and mixed-signal systems has been a barrier to broader applications. The implementation of floating-gate transistors has begun to pave the way for a more reasonable approach to analog design. Floating-gate technology has widespread use in the digital domain. Analog and mixed-signal use of floating-gate transistors has only become a rising field of study in recent years. Analog floating gates allow for low-power implementation of mixed-signal systems, such as the field-programmable analog array, while simultaneously opening the door to complex signal-processing techniques. The field-programmable analog array, which leverages floating-gate technologies, is demonstrated as a reliable replacement to signal-processing tasks previously only solved by custom design. Living in an analog world demands the constant use and refinement of analog signal processing for the purpose of interfacing with digital systems. This work offers a comprehensive look at utilizing floating-gate transistors as the core element for analog signal-processing tasks. This work demonstrates the floating gate\u27s merit in large reconfigurable array-driven systems and in smaller-scale implementations, such as linearization techniques for oscillators and analog-to-digital converters. A study on analog floating-gate reliability is complemented with a temperature compensation scheme for implementing these systems in ever-changing, realistic environments

B.O.G.G.L.E.S.: Boundary Optical GeoGraphic Lidar Environment System

The purpose of this paper is to describe a pseudo X-ray vision system that pairs a Lidar scanner with a visualization device. The system as a whole is referred to as B.O.G.G.L.E.S. There are several key factors that went into the development of this system and the background information and design approach are thoroughly described. B.O.G.G.L.E.S functionality is depicted through the use of design constraints and the analysis of test results. Additionally, many possible developments for B.O.G.G.L.E.S are proposed in the paper. This indicates that there are various avenues of improvement for this project that could be implemented in the future

Generalised sensor linearisation and calibration

The aim of this work was to conduct a survey of current sensor measurement technologies and investigate sensor linearisation, cahbration and compensation methods m order to determine the methods most suitable for generic embedded sensor implementation. The thesis contains a comprehensive survey of sensor technologies and their interfacing requirements as a prerequisite for determining modules required by the generic embedded sensor interface. Different linearisation and calibration techmques are investigated and the most promising techniques, curve fitting and progressive polynomial calibration method, are then examined in greater detail and simulations performed to compare their performance. The fundamental limitations and trade offs in design and implementation on the microprocessor of these methods are studied. The design of the compensation module is also presented and its implementation on the microprocessor m the form of the C code is described. All methods are tested and implemented on a PIC microcontroller as a part of linearisation, cahbration and compensation module of the generic embedded sensor interface

Ultra-low Power Circuits for Internet of Things (IOT)

Miniaturized sensor nodes offer an unprecedented opportunity for the semiconductor industry which led to a rapid development of the application space: the Internet of Things (IoT). IoT is a global infrastructure that interconnects physical and virtual things which have the potential to dramatically improve people's daily lives. One of key aspect that makes IoT special is that the internet is expanding into places that has been ever reachable as device form factor continue to decreases. Extremely small sensors can be placed on plants, animals, humans, and geologic features, and connected to the Internet. Several challenges, however, exist that could possibly slow the development of IoT. In this thesis, several circuit techniques as well as system level optimizations to meet the challenging power/energy requirement for the IoT design space are described. First, a fully-integrated temperature sensor for battery-operated, ultra-low power microsystems is presented. Sensor operation is based on temperature independent/dependent current sources that are used with oscillators and counters to generate a digital temperature code. Second, an ultra-low power oscillator designed for wake-up timers in compact wireless sensors is presented. The proposed topology separates the continuous comparator from the oscillation path and activates it only for short period when it is required. As a result, both low power tracking and generation of precise wake-up signal is made possible. Third, an 8-bit sub-ranging SAR ADC for biomedical applications is discussed that takes an advantage of signal characteristics. ADC uses a moving window and stores the previous MSBs voltage value on a series capacitor to achieve energy saving compared to a conventional approach while maintaining its accuracy. Finally, an ultra-low power acoustic sensing and object recognition microsystem that uses frequency domain feature extraction and classification is presented. By introducing ultra-low 8-bit SAR-ADC with 50fF input capacitance, power consumption of the frontend amplifier has been reduced to single digit nW-level. Also, serialized discrete Fourier transform (DFT) feature extraction is proposed in a digital back-end, replacing a high-power/area-consuming conventional FFT.PHDElectrical EngineeringUniversity of Michigan, Horace H. Rackham School of Graduate Studieshttps://deepblue.lib.umich.edu/bitstream/2027.42/137157/1/seojeong_1.pd

Improved PWM A/D conversion technique: working principle and model validation

Analog-to-digital conversion plays a central role in any application of digital sensors and sensor systems that require an interface between analog devices, namely analog sensors, and digital devices, namely, microprocessors, digital signal processors or microcontrollers. With the advent of smart sensing, the integration of signal conditioning, analog-to-digital and digital data processing in single hardware devices became a reality. Moreover, the usage of low-cost discrete A/D conversion techniques for applications that are not critic in terms of accuracy, resolution or conversion rate, are considering increasingly mixed hardware and software A/D solutions tailored for specific application demands. In this context, this chapter presents a discrete low-cost A/D conversion solution based on pulse width modulation particularly suited for microcontrollers' integration with smart sensing devices.info:eu-repo/semantics/publishedVersio

Design and development of a novel Invasive Blood Pressure simulator for patient's monitor testing

This paper presents a newly-designed and realized Invasive Blood Pressure (IBP) device for the simulation on patient’s monitors. This device shows improvements and presents extended features with respect to a first prototype presented by the authors and similar systems available in the state-of-the-art. A peculiarity of the presented device is that all implemented features can be customized from the developer and from the point of view of the end user. The realized device has been tested, and its performances in terms of accuracy and of the back-loop measurement of the output for the blood pressure regulation utilization have been described. In particular, an accuracy of ±1 mmHg at 25 °C, on a range from −30 to 300 mmHg, was evaluated under different test conditions. The designed device is an ideal tool for testing IBP modules, for zero setting, and for calibrations. The implemented extended features, like the generation of custom waveforms and the Universal Serial Bus (USB) connectivity, allow use of this device in a wide range of applications, from research to equipment maintenance in clinical environments to educational purposes. Moreover, the presented device represents an innovation, both in terms of technology and methodologies: It allows quick and efficient tests to verify the proper functioning of IBP module of patients’ monitors. With this innovative device, tests can be performed directly in the field and faster procedures can be implemented by the clinical maintenance personnel. This device is an open source project and all materials, hardware, and software are fully available for interested developers or researchers.Web of Science201art. no. 25

Estudio y diseño de dos placas de intercambio de datos de inclinación y posición entre dos cubesats

El grupo de investigación DISEN con sede en el Campus de Terrassa de la UPC está intentando impulsar el proyecto de la implementación de una infraestructura de comunicaciones basada en el enlace óptico de CubeSats. Mediante este tipo de comunicación, se podría obtener un mayor data-rate y un menor consumo de potencia que en los actuales sistemas de radiofrecuencia. Para poder realizar este enlace óptico, es necesario que el rayo láser proveniente de uno de los satélites se centre de forma muy precisa en el foto-detector del otro satélite. Para realizar dicho centrado, ambos satélites deberán conocer a priori la posición e inclinación de ambos, información que deberán intercambiarse mediante radiofrecuencia. El presente TFG versa sobre el diseño del subsistema de intercambio de datos de posición e inclinación entre dos CubeSats. Concretamente, el diseño de dos placas PCB formadas por un módulo GPS, para obtener la posición de los CubeSats; un módulo IMU, para obtener sus actitudes; un módulo de radio UHF, para enviar datos entre los dos CubeSats por radiofrecuencia; y un módulo Bluetooth para poder enlazar el sistema con el ordenador de base. Además, las placas cuentan con un microcontrolador para procesar y almacenar la información de dichos módulos