Fault-tolerant interconnection networks for multiprocessor systems

Interconnection networks represent the backbone of multiprocessor systems. A failure in the network, therefore, could seriously degrade the system performance. For this reason, fault tolerance has been regarded as a major consideration in interconnection network design. This thesis presents two novel techniques to provide fault tolerance capabilities to three major networks: the Baseline network, the Benes network and the Clos network. First, the Simple Fault Tolerance Technique (SFT) is presented. The SFT technique is in fact the result of merging two widely known interconnection mechanisms: a normal interconnection network and a shared bus. This technique is most suitable for networks with small switches, such as the Baseline network and the Benes network. For the Clos network, whose switches may be large for the SFT, another technique is developed to produce the Fault-Tolerant Clos (FTC) network. In the FTC, one switch is added to each stage. The two techniques are described and thoroughly analyzed

ON VULNERABILITY MEASURES OF NETWORKS

As links and nodes of interconnection networks are exposed to failures, one of the most important features of a practical networks design is fault tolerance. Vulnerability measures of communication networks are discussed including the connectivities, fault diameters, and measures based on Hosoya-Wiener polynomial. An upper bound for the edge fault diameter of product graphs is proved

ON VULNERABILITY MEASURES OF NETWORKS

As links and nodes of interconnection networks are exposed to failures, one of the most important features of a practical networks design is fault tolerance. Vulnerability measures of communication networks are discussed including the connectivities, fault diameters, and measures based on Hosoya-Wiener polynomial. An upper bound for the edge fault diameter of product graphs is proved

Speeding-up the fault-tolerance analysis of interconnection networks

© 2015 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting/republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksAnalyzing the fault-tolerance of interconnection networks implies checking the connectivity of each sourcedestination pair. The size of the exploration space of such operation skyrockets with the network size and with the number of link faults. However, this problem is highly parallelizable since the exploration of each path between a source–destination pair is independent of the other paths. This paper presents an approach to analyze the fault-tolerance degree of multistage interconnection networks using GPUs in order to speed-up it. This approach uses CUDA as parallel programming tool on a GPU in order to take advantage of all available cores. Results show that the execution time of the fault-tolerance exploration can be significantly reduced.This work was supported by the Spanish Ministerio de Economía y Competitividad (MINECO) and by FEDER funds under Grant TIN2012-38341-C04-01.Bermúdez Garzón, DF.; Gómez Requena, C.; López Rodríguez, PJ.; Gómez Requena, ME. (2015). Speeding-up the fault-tolerance analysis of interconnection networks. IEEE. https://doi.org/10.1109/HPCSim.2015.7237035

Edge-Fault Tolerance of Hypercube-like Networks

This paper considers a kind of generalized measure $\lambda_s^{(h)}$ of fault tolerance in a hypercube-like graph $G_n$ which contain several well-known interconnection networks such as hypercubes, varietal hypercubes, twisted cubes, crossed cubes and M\"obius cubes, and proves $\lambda_s^{(h)}(G_n)= 2^h(n-h)$ for any $h$ with $0\leqslant h\leqslant n-1$ by the induction on $n$ and a new technique. This result shows that at least $2^h(n-h)$ edges of $G_n$ have to be removed to get a disconnected graph that contains no vertices of degree less than $h$. Compared with previous results, this result enhances fault-tolerant ability of the above-mentioned networks theoretically

Application of coding theory to interconnection networks

AbstractWe give a few examples of applications of techniques and results borrowed from error-correcting codes to problems in graphs and interconnection networks. The degree and diameter of Cayley graphs with vertex set (Z2Z)r are investigated. The asymptotic case is dealt with in Section 2. The robustness, or fault tolerance, of the n-cube interconnection network is studied in Section 3