Fast Algorithms for High Frequency Interconnect Modeling in VLSI Circuits and Packages

Interconnect modeling plays an important role in design and verification of VLSI circuits and packages. For low frequency circuits, great advances for parasitic resistance and capacitance extraction have been achieved and wide varieties of techniques are available. However, for high frequency circuits and packages, parasitic inductance and impedance extraction still poses a tremendous challenge. Existing algorithms, such as FastImp and FastHenry developed by MIT, are slow and inherently unable to handle multiple dielectrics and magnetic materials. In this research, we solve three problems in interconnect modeling for high frequency circuits and packages. 1) Multiple dielectrics are common in integrated circuits and packages. We propose the first Boundary Element Method (BEM) algorithm for impedance extraction of interconnects with multiple dielectrics. The algorithm uses a novel equivalentcharge formulation to model the extraction problem with significantly fewer unknowns. Then fast matrix-vector multiplication and effective preconditioning techniques are applied to speed up the solution of linear systems. Experimental results show that the algorithm is significantly faster than existing methods with sufficient accuracy. 2) Magnetic materials are widely used in MEMS, RFID and MRAM. We present the first BEM algorithm to extract interconnect inductance with magnetic materials. The algorithm models magnetic characteristics by the Landau Lifshitz Gilbert equation and fictitious magnetic charges. The algorithm is accelerated by approximating magnetic charge effects and by modeling currents with solenoidal basis. The relative error of the algorithm with respect to the commercial tool is below 3%, while the speed is up to one magnitude faster. 3) Since traditional interconnect model includes mutual inductances between pairs of segments, the resulting circuit matrix is very dense. This has been the main bottleneck in the use of the interconnect model. Recently, K = L-1 is used. The RKC model is sparse and stable. We study the practical issues of the RKC model. We validate the RKC model and propose an efficient way to achieve high accuracy extraction by circuit simulations of practical examples

Comparative Analysis of Prior Knowledge-Based Machine Learning Metamodels for Modeling Hybrid Copper–Graphene On-Chip Interconnects

In this article, machine learning (ML) metamodels have been developed in order to predict the per-unit-length parameters of hybrid copper–graphene on-chip interconnects based on their structural geometry and layout. ML metamodels within the context of this article include artificial neural networks, support vector machines (SVMs), and least-square SVMs. The salient feature of all these ML metamodels is that they exploit the prior knowledge of the p.u.l. parameters of the interconnects obtained from cheap empirical models to reduce the number of expensive full-wave electromagnetic (EM) simulations required to extract the training data. Thus, the proposed ML metamodels are referred to as prior knowledge-based machine learning (PKBML) metamodels. The PKBML metamodels offer the same accuracy as conventional ML metamodels trained exclusively by full-wave EM solver data, but at the expense of far smaller training time costs. In this article, detailed comparative analysis of the proposed PKBML metamodels have been performed using multiple numerical examples

Superconducting routing platform for large-scale integration of quantum technologies

To reach large-scale quantum computing, three-dimensional integration of scalable qubit arrays and their control electronics in multi-chip assemblies is promising. Within these assemblies, the use of superconducting interconnections, as routing layers, offers interesting perspective in terms of (1) thermal management to protect the qubits from control electronics self-heating, (2) passive device performance with significant increase of quality factors and (3) density rise of low and high frequency signals thanks to minimal dispersion. We report on the fabrication, using 200 mm silicon wafer technologies, of a multi-layer routing platform designed for the hybridization of spin qubit and control electronics chips. A routing level couples the qubits and the control circuits through one layer of Al0.995Cu0.005 and superconducting layers of TiN, Nb or NbN, connected between them by W-based vias. Wafer-level parametric tests at 300 K validate the yield of these technologies and low temperature electrical measurements in cryostat are used to extract the superconducting properties of the routing layers. Preliminary low temperature radio-frequency characterizations of superconducting passive elements, embedded in these routing levels, are presented

Distributed Modeling Approach for Electrical and Thermal Analysis of High-Frequency Transistors

The research conducted in this dissertation is focused on developing modeling approaches for analyzing high-frequency transistors and present solutions for optimizing the device output power and gain. First, a literature review of different transistor types utilized in high-frequency regions is conducted and gallium nitride high electron mobility transistor is identified as the promising device for these bands. Different structural configurations and operating modes of these transistors are explained, and their applications are discussed. Equivalent circuit models and physics-based models are also introduced and their limitations for analyzing the small-signal and large-signal behavior of these devices are explained. Next, a model is developed to investigate the thermal properties of different semiconductor substrates. Heat dissipation issues associated with some substrate materials, such as sapphire, silicon, and silicon carbide are identified, and thinning the substrates is proposed as a preliminary solution for addressing them. This leads to a comprehensive and universal approach to increase the heat dissipation capabilities of any substrate material and 2X-3X improvement is achieved according to this novel technique. Moreover, for analyzing the electrical behavior of these devices, a small-signal model is developed to examine the operation of transistors in the linear regions. This model is obtained based on an equivalent circuit which includes the distributed effects of the device at higher frequency bands. In other words, the wave propagation effects and phase velocity mismatches are considered when developing the model. The obtained results from the developed simulation tool are then compared with the measurements and excellent agreement is achieved between the two cases, which serves as the proof for validation. Additionally, this model is extended to predict and analyze the nonlinear behavior of these transistors and the developed tool is validated according to the obtained large-signal analysis results from measurement. Based on the developed modeling approach, a novel fabrication technique is also proposed which ensures the high-frequency operability of current devices with the available fabrication technologies, without forfeiting the gain and output power. The technical details regarding this approach and a sample configuration of the electrode model for the transistor based on the proposed design are also provided

A Systematic Electromagnetic-Circuit Method for EMI Analysis of Coupled Interconnects on Dispersive Dielectrics

published_or_final_versio

Efficient Macromodeling and Fast Transient Simulation of High Speed Distributed Interconnects

In the first part of the thesis, an efficient macromodeling technique based on Loewner Matrix (LM) approach has been presented to model multi-port distributed systems using tabulated noisy data. In the proposed method, Loewner Model data from previous rational approximation are used to create less noisy eigenvectors in an iterative manner. As a result, the biasing effect of the LM model approximated by the noisy data is reduced. It is illustrated that this method improves the accuracy of the Loewner Matrix modeling for noisy frequency data. In the second part, a fast and robust algorithm is introduced for time-domain simulation of interconnects with few nonlinear elements based on Large Change Sensitivity approach. After macromodeling interconnects, linear parts of the system construct very large matrix. Large linear matrix with nonlinear components makes time domain simulation a Central Processing Unit (CPU) intensive task where inversion (one Lower/Upper (LU) decomposition and one forward/backward substitution) of this large matrix is done at each step of the Newton-Raphson iteration. Using the proposed method, large system matrix is partitioned into linear and nonlinear parts and LU decomposition of linear matrix is done only once in the entire simulation. Nonlinear elements construct a very small matrix compared to large linear matrix. In this proposed method, small matrix is inverted at each Newton iteration. Cost of inverting a small matrix is much cheaper than inverting a very large matrix. Therefore, this approach is faster than the conventional matrix inversion method. Numerical examples are presented illustrating validity and efficiency of the above method

Electrical performance analysis of high-speed interconnects and circuits by numerical modeling methods

Ph.DDOCTOR OF PHILOSOPH

I/O port macromodelling

3D electromagnetic modelling and simulation of various Printed Circuit Board (PCB) components is an important technique for characterizing the Signal Integrity (SI) and Electromagnetic Compatibility (EMC) issues present in a PCB. However, due to limited computational resource and the complexity of the integrated circuits, it is currently not possible to fully model a complete PCB system with 3D electromagnetic solvers. An effort has been made to fully model the PCB with all its components and their S-parameters has been derived so as to integrate these S-parameters in 1D, 2D static or quasi-static field solver or circuit solver tool. The novelty of this thesis is the development and verification of active circuit such as Input and Output buffers and passive channel components such as interconnects, via and connectors and deriving their S-parameters in order to model and characterize the complete PCB using 3D full field solver based on Transmission Line Matrix modelling (TLM) method. An integration of Input/Output (I/O) port in the 3D full field modelling method allows for modelling of the complete PCB system without being computationally expensive. This thesis presents a method for integration of Input/Output port in the 3D time domain modelling environment. Several software tools are available in the market which can characterize these PCBs in the frequency as well as the time domain using 1D, 2D techniques or using circuit solver such as spice. The work in this thesis looks at extending these 1D and 2D techniques for 3D Electromagnetic solvers in the time domain using the TLM technique for PCB analysis. The modelling technique presented in this thesis is based on in-house developed 3D TLM method along with a developed behavioral Integrated Circuit (IC) – macromodel. The method has been applied to a wide variety of PCB topologies along with a range of IC packages to fully validate the approach. The method has also been applied to show the switching effect arising out of the crosstalk in a logic device apart from modelling various discontinuities of PCB interconnects in the form of S11 and S21 parameters. The proposed novel TLM based technique has been selected based on simplification of its approach, electrical equivalence (rather than complex mathematical functions of Maxwell's electromagnetic theory), time domain analysis for transients in a PCB with an increased accuracy over other available methods in the literature. On the experimental side two, four and six layered PCBs with various interconnect discontinuities such as straight line, right angle, fan-out and via and IC packages such as SOT-23 (DBV), SC-70 (DCK) and SOT-553 (DRL) has been designed and manufactured. The modelling results have been verified with the experimental results of these PCBs and other commercial software such as HSPICE, CST design studio available in the market. While characterizing the SI issues, these modelling results can also help in analyzing conducted and radiated EMC/EMI problems to meet various EMC regulations such as CE, FCC around the world