Modeling Solder Ball Array Interconnects for Power Module Optimization

PowerSynth is a software platform that can co-optimize power modules utilizing a 2D topology and wire bond interconnects. The novel 3D architectures being proposed at the University of Arkansas utilize solder ball interconnects instead of wire bonds. Therefore, they currently cannot be optimized using PowerSynth. This paper examines methods to accurately model the parasitic inductance of solder balls and ball grid arrays so they may be implemented into software for optimization. Proposed mathematical models are validated against ANSYS Electromagnetics Suite simulations. A comparison of the simulated data shows that mathematical models are well suited for implementation into optimization software platforms. Experimental measurements proved to be inconclusive and necessitate future work

Entire domain basis function expansion of the differential surface admittance for efficient broadband characterization of lossy interconnects

This article presents a full-wave method to characterize lossy conductors in an interconnect setting. To this end, a novel and accurate differential surface admittance operator for cuboids based on entire domain basis functions is formulated. By combining this new operator with the augmented electric field integral equation, a comprehensive broadband characterization is obtained. Compared with the state of the art in differential surface admittance operator modeling, we prove the accuracy and improved speed of the novel formulation. Additional examples support these conclusions by comparing the results with commerical software tools and with measurements

System, Circuit, And Method For Testing An Interconnect In A Multi-chip Substrate

A system for testing interconnects in multi-chip modules including a radio frequency resonator having a resonant circuit with a relatively high quality factor, the output of the resonant circuit being attached to a probe. Electrically coupled to the resonant circuit output is an apparatus to analyze the voltage signal output. The probe is applied to one end of an interconnect. When the probe is applied, the resonant frequency of the resonant circuit and the magnitude of the frequency response are altered due to the additional loading created by the interconnect. Due to the relatively high quality factor of the resonant circuit, the magnitude of the frequency response of the altered resonant circuit is measurably distinct from a predetermined reference magnitude at a predetermined reference frequency, thus indicating the existence of a defect. Additionally, the type of defect that exists is ascertainable by determining whether the resonant frequency of the altered resonant circuit is greater or less than the reference frequency by examining, for example, the phase response.Georgia Tech Research Corporatio

Cancellation of crosstalk-induced jitter

A novel jitter equalization circuit is presented that addresses crosstalk-induced jitter in high-speed serial links. A simple model of electromagnetic coupling demonstrates the generation of crosstalk-induced jitter. The analysis highlights unique aspects of crosstalk-induced jitter that differ from far-end crosstalk. The model is used to predict the crosstalk-induced jitter in 2-PAM and 4-PAM, which is compared to measurement. Furthermore, the model suggests an equalizer that compensates for the data-induced electromagnetic coupling between adjacent links and is suitable for pre- or post-emphasis schemes. The circuits are implemented using 130-nm MOSFETs and operate at 5-10 Gb/s. The results demonstrate reduced deterministic jitter and lower bit-error rate (BER). At 10 Gb/s, the crosstalk-induced jitter equalizer opens the eye at 10^sup-12 BER from 17 to 45 ps and lowers the rms jitter from 8.7 to 6.3 ps

Modeling and Analysis of Noise and Interconnects for On-Chip Communication Link Design

This thesis considers modeling and analysis of noise and interconnects in onchip communication. Besides transistor count and speed, the capabilities of a modern design are often limited by on-chip communication links. These links typically consist of multiple interconnects that run parallel to each other for long distances between functional or memory blocks. Due to the scaling of technology, the interconnects have considerable electrical parasitics that affect their performance, power dissipation and signal integrity. Furthermore, because of electromagnetic coupling, the interconnects in the link need to be considered as an interacting group instead of as isolated signal paths. There is a need for accurate and computationally effective models in the early stages of the chip design process to assess or optimize issues affecting these interconnects. For this purpose, a set of analytical models is developed for on-chip data links in this thesis. First, a model is proposed for modeling crosstalk and intersymbol interference. The model takes into account the effects of inductance, initial states and bit sequences. Intersymbol interference is shown to affect crosstalk voltage and propagation delay depending on bus throughput and the amount of inductance. Next, a model is proposed for the switching current of a coupled bus. The model is combined with an existing model to evaluate power supply noise. The model is then applied to reduce both functional crosstalk and power supply noise caused by a bus as a trade-off with time. The proposed reduction method is shown to be effective in reducing long-range crosstalk noise. The effects of process variation on encoded signaling are then modeled. In encoded signaling, the input signals to a bus are encoded using additional signaling circuitry. The proposed model includes variation in both the signaling circuitry and in the wires to calculate the total delay variation of a bus. The model is applied to study level-encoded dual-rail and 1-of-4 signaling. In addition to regular voltage-mode and encoded voltage-mode signaling, current-mode signaling is a promising technique for global communication. A model for energy dissipation in RLC current-mode signaling is proposed in the thesis. The energy is derived separately for the driver, wire and receiver termination.Siirretty Doriast