Automatic Number Plate Recognition on FPGA

Automatic Number Plate Recognition (ANPR) systems have become one of the most important components in the current Intelligent Transportation Systems (ITS). In this paper, a FPGA implementation of a complete ANPR system which consists of Number Plate Localisation (NPL), Character Segmentation (CS), and Optical Character Recognition (OCR) is presented. The Mentor Graphics RC240 FPGA development board was used for the implementation, where only 80% of the available on-chip slices of a Virtex-4 LX60 FPGA have been used. The whole system runs with a maximum frequency of 57.6 MHz and is capable of processing one image in 11ms with a successful recognition rate of 93%

Optical character recognition on heterogeneous SoC for HD automatic number plate recognition system

Automatic number plate recognition (ANPR) systems are becoming vital for safety and security purposes. Typical ANPR systems are based on three stages: number plate localization (NPL), character segmentation (CS), and optical character recognition (OCR). Recently, high definition (HD) cameras have been used to improve their recognition rates. In this paper, four algorithms are proposed for the OCR stage of a real-time HD ANPR system. The proposed algorithms are based on feature extraction (vector crossing, zoning, combined zoning, and vector crossing) and template matching techniques. All proposed algorithms have been implemented using MATLAB as a proof of concept and the best one has been selected for hardware implementation using a heterogeneous system on chip (SoC) platform. The selected platform is the Xilinx Zynq-7000 All Programmable SoC, which consists of an ARM processor and programmable logic. Obtained hardware implementation results have shown that the proposed system can recognize one character in 0.63 ms, with an accuracy of 99.5% while utilizing around 6% of the programmable logic resources. In addition, the use of the heterogenous SoC consumes 36 W which is equivalent to saving around 80% of the energy consumed by the PC used in this work, whereas it is smaller in size by 95%

Digital image enhancement by brightness and contrast manipulation using Verilog hardware description language

A foggy environment may cause digitally captured images to appear blurry, dim, or low in contrast. This will impact computer vision systems that rely on image information. With the need for real-time image information, such as a plate number recognition system, a simple yet effective image enhancement algorithm using a hardware implementation is very much needed to fulfil the need. To improve images that suffer from low exposure and hazy, the hardware implementations are usually based on complex algorithms. Hence, the aim of this paper is to propose a less complex enhancement algorithm for hardware implementation that is able to improve the quality of such images. The proposed method simply combines brightness and contrast manipulation to enhance the image. In order to see the performance of the proposed method, a total of 100 vehicle registration number images were collected, enhanced, and evaluated. The evaluation results were compared to two other enhancement methods quantitatively and qualitatively. Quantitative evaluation is done by evaluating the output image using peak signal-to-noise ratio and mean-square error evaluation metrics, while a survey is done to evaluate the output image qualitatively. Based on the quantitative evaluation results, our proposed method outperforms the other two enhancement methods

IMPROVED LICENSE PLATE LOCALIZATION ALGORITHM BASED ON MORPHOLOGICAL OPERATIONS

Automatic License Plate Recognition (ALPR) systems have become an important tool to track stolen cars, access control, and monitor traffic. ALPR system consists of locating the license plate in an image, followed by character detection and recognition. Since the license plate can exist anywhere within an image, localization is the most important part of ALPR and requires greater processing time. Most ALPR systems are computationally intensive and require a high-performance computer. The proposed algorithm differs significantly from those utilized in previous ALPR technologies by offering a fast algorithm, composed of structural elements which more precisely conducts morphological operations within an image, and can be implemented in portable devices with low computation capabilities. The proposed algorithm is able to accurately detect and differentiate license plates in complex images. This method was first tested through MATLAB with an on-line public database of Greek license plates which is a popular benchmark used in previous works. The proposed algorithm was 100% accurate in all clear images, and achieved 98.45% accuracy when using the entire database which included complex backgrounds and license plates obscured by shadow and dirt. Second, the efficiency of the algorithm was tested in devices with low computational processing power, by translating the code to Python, and was 300% faster than previous work

Efficient machine learning: models and accelerations

One of the key enablers of the recent unprecedented success of machine learning is the adoption of very large models. Modern machine learning models typically consist of multiple cascaded layers such as deep neural networks, and at least millions to hundreds of millions of parameters (i.e., weights) for the entire model. The larger-scale model tend to enable the extraction of more complex high-level features, and therefore, lead to a significant improvement of the overall accuracy. On the other side, the layered deep structure and large model sizes also demand to increase computational capability and memory requirements. In order to achieve higher scalability, performance, and energy efficiency for deep learning systems, two orthogonal research and development trends have attracted enormous interests. The first trend is the acceleration while the second is the model compression. The underlying goal of these two trends is the high quality of the models to provides accurate predictions. In this thesis, we address these two problems and utilize different computing paradigms to solve real-life deep learning problems. To explore in these two domains, this thesis first presents the cogent confabulation network for sentence completion problem. We use Chinese language as a case study to describe our exploration of the cogent confabulation based text recognition models. The exploration and optimization of the cogent confabulation based models have been conducted through various comparisons. The optimized network offered a better accuracy performance for the sentence completion. To accelerate the sentence completion problem in a multi-processing system, we propose a parallel framework for the confabulation recall algorithm. The parallel implementation reduce runtime, improve the recall accuracy by breaking the fixed evaluation order and introducing more generalization, and maintain a balanced progress in status update among all neurons. A lexicon scheduling algorithm is presented to further improve the model performance. As deep neural networks have been proven effective to solve many real-life applications, and they are deployed on low-power devices, we then investigated the acceleration for the neural network inference using a hardware-friendly computing paradigm, stochastic computing. It is an approximate computing paradigm which requires small hardware footprint and achieves high energy efficiency. Applying this stochastic computing to deep convolutional neural networks, we design the functional hardware blocks and optimize them jointly to minimize the accuracy loss due to the approximation. The synthesis results show that the proposed design achieves the remarkable low hardware cost and power/energy consumption. Modern neural networks usually imply a huge amount of parameters which cannot be fit into embedded devices. Compression of the deep learning models together with acceleration attracts our attention. We introduce the structured matrices based neural network to address this problem. Circulant matrix is one of the structured matrices, where a matrix can be represented using a single vector, so that the matrix is compressed. We further investigate a more flexible structure based on circulant matrix, called block-circulant matrix. It partitions a matrix into several smaller blocks and makes each submatrix is circulant. The compression ratio is controllable. With the help of Fourier Transform based equivalent computation, the inference of the deep neural network can be accelerated energy efficiently on the FPGAs. We also offer the optimization for the training algorithm for block circulant matrices based neural networks to obtain a high accuracy after compression

Development of Automatic Digitization of Truck Number in Open Cast Mines Using Microcontroller

Geological condition in mines appears to be extremely complicated and there are many intelligence security problems. Production is falsely transfer by the unauthorized truck from mine pits also at loading point. It also lifted in wrong ways by malfunctioning of the truck weight in Weigh Bridge. Mining organizations are under the control of mafia and countless can be added to the mines mafia. An intelligence security system is need to monitor truck number in automatically using image acquisition method, automatic detection, recognition process, communication technology, information technology and microcontroller innovation to understand the working specification of the mining region. Tracking of the number plate from the truck is an important task, which demands intelligent solution. Intelligent surveillance in open casts mine security network using data accession is a prime task that protects the secure production of mines. So automatic truck number recognition technique is used to recognize the registration number of the truck which is used for transferring the mine production as well as track record the amount of the production. It also preserves the mines and thus improving its security. For extraction and recognition of number plate from truck image the system is uses MATLAB software tool. It is assumed that images of the truck have been captured from digital camera. The data acquisition terminal uses the PIC16F877A microcontroller as a core chip for sending data. The data are communicated through USB to TTL converter (RS232) with the main circuit to realize intelligent monitoring. To store the data in permanently it is uses EEPROM chip. Alphanumeric Characters on plate has been extracted and recognized using template images of alphanumeric characters. The proposed system performs the real time data monitoring to recognize the registration number plate of the trucks for getting required important information. It also provides to maintenance the history of data and support access contro

Hardware dedicado para sistemas empotrados de visión

La constante evolución de las Tecnologías de la Información y las Comunicaciones no solo ha permitido que más de la mitad de la población mundial esté actualmente interconectada a través de Internet, sino que ha sido el caldo de cultivo en el que han surgido nuevos paradigmas, como el ‘Internet de las cosas’ (IoT) o la ‘Inteligencia ambiental’ (AmI), que plantean la necesidad de interconectar objetos con distintas funcionalidades para lograr un entorno digital, sensible y adaptativo, que proporcione servicios de muy distinta índole a sus usuarios. La consecución de este entorno requiere el desarrollo de dispositivos electrónicos de bajo coste que, con tamaño y peso reducido, sean capaces de interactuar con el medio que los rodea, operar con máxima autonomía y proporcionar un elevado nivel de inteligencia. La funcionalidad de muchos de estos dispositivos incluirá la capacidad para adquirir, procesar y transmitir imágenes, extrayendo, interpretando o modificando la información visual que resulte de interés para una determinada aplicación. En el marco de este desafío surge la presente Tesis Doctoral, cuyo eje central es el desarrollo de hardware dedicado para la implementación de algoritmos de procesamiento de imágenes y secuencias de vídeo usados en sistemas empotrados de visión. El trabajo persigue una doble finalidad. Por una parte, la búsqueda de soluciones que, por sus prestaciones y rendimiento, puedan ser incorporadas en sistemas que satisfagan las estrictas exigencias de funcionalidad, tamaño, consumo de energía y velocidad de operación demandadas por las nuevas aplicaciones. Por otra, el diseño de una serie de bloques funcionales implementados como módulos de propiedad intelectual, que permitan aliviar la carga computacional de las unidades de procesado de los sistemas en los que se integren. En la Tesis se proponen soluciones específicas para la implementación de dos tipos de operaciones habitualmente presentes en muchos sistemas de visión artificial: la sustracción de fondo y el etiquetado de componentes conexos. Las distintas alternativas surgen como consecuencia de aplicar una adecuada relación de compromiso entre funcionalidad y coste, entendiendo este último criterio en términos de recursos de cómputo, velocidad de operación y potencia consumida, lo que permite cubrir un amplio espectro de aplicaciones. En algunas de las soluciones propuestas se han utilizado además, técnicas de inferencia basadas en Lógica Difusa con idea de mejorar la calidad de los sistemas de visión resultantes. Para la realización de los diferentes bloques funcionales se ha seguido una metodología de diseño basada en modelos, que ha permitido la realización de todo el ciclo de desarrollo en un único entorno de trabajo. Dicho entorno combina herramientas informáticas que facilitan las etapas de codificación algorítmica, diseño de circuitos, implementación física y verificación funcional y temporal de las distintas alternativas, acelerando con ello todas las fases del flujo de diseño y posibilitando una exploración más eficiente del espacio de posibles soluciones. Asimismo, con el objetivo de demostrar la funcionalidad de las distintas aportaciones de esta Tesis Doctoral, algunas de las soluciones propuestas han sido integradas en sistemas de vídeo reales, que emplean buses estándares de uso común. Los dispositivos seleccionados para llevar a cabo estos demostradores han sido FPGAs y SoPCs de Xilinx, ya que sus excelentes propiedades para el prototipado y la construcción de sistemas que combinan componentes software y hardware, los convierten en candidatos ideales para dar soporte a la implementación de este tipo de sistemas.The continuous evolution of the Information and Communication Technologies (ICT), not only has allowed more than half of the global population to be currently interconnected through Internet, but it has also been the breeding ground for new paradigms such as Internet of Things (ioT) or Ambient Intelligence (AmI). These paradigms expose the need of interconnecting elements with different functionalities in order to achieve a digital, sensitive, adaptive and responsive environment that provides services of distinct nature to the users. The development of low cost devices, with small size, light weight and a high level of autonomy, processing power and ability for interaction is required to obtain this environment. Attending to this last feature, many of these devices will include the capacity to acquire, process and transmit images, extracting, interpreting and modifying the visual information that could be of interest for a certain application. This PhD Thesis, focused on the development of dedicated hardware for the implementation of image and video processing algorithms used in embedded systems, attempts to response to this challenge. The work has a two-fold purpose: on one hand, the search of solutions that, for its performance and properties, could be integrated on systems with strict requirements of functionality, size, power consumption and speed of operation; on the other hand, the design of a set of blocks that, packaged and implemented as IP-modules, allow to alleviate the computational load of the processing units of the systems where they could be integrated. In this Thesis, specific solutions for the implementation of two kinds of usual operations in many computer vision systems are provided. These operations are background subtraction and connected component labelling. Different solutions are created as the result of applying a good performance/cost trade-off (approaching this last criteria in terms of area, speed and consumed power), able to cover a wide range of applications. Inference techniques based on Fuzzy Logic have been applied to some of the proposed solutions in order to improve the quality of the resulting systems. To obtain the mentioned solutions, a model based-design methodology has been applied. This fact has allowed us to carry out all the design flow from a single work environment. That environment combines CAD tools that facilitate the stages of code programming, circuit design, physical implementation and functional and temporal verification of the different algorithms, thus accelerating the overall processes and making it possible to explore the space of solutions. Moreover, aiming to demonstrate the functionality of this PhD Thesis’s contributions, some of the proposed solutions have been integrated on real video systems that employ common and standard buses. The devices selected to perform these demonstrators have been FPGA and SoPCs (manufactured by Xilinx) since, due to their excellent properties for prototyping and creating systems that combine software and hardware components, they are ideal to develop these applications

Research of Indonesian license plates recognition on moving vehicles

The recognition of the characters in the license plate has been widely studied, but research to recognize the character of the license plate on a moving car is still rarely studied. License plate recognition on a moving car has several difficulties, for example capturing still images on moving images with non-blurred results. In addition, there are also several problems such as environmental disturbances (low lighting levels and heavy rain). In this study, a novel framework for recognizing license plate numbers is proposed that can overcome these problems. The proposed method in this study: detects moving vehicles, judges the existence of moving vehicles, captures moving vehicle images, deblurring images, locates license plates, extracts vertical edges, removes unnecessary edge lines, segments license plate locations, Indonesian license plate cutting character segmenting, character recognition. Experiments were carried out under several conditions: suitable conditions, poor lighting conditions (dawn, evening, and night), and unfavourable weather conditions (heavy rain, moderate rain, and light rain). In the experiment to test the success of the license plate number recognition, it was seen that the proposed method succeeded in recognizing 98.1 % of the total images tested. In unfavorable conditions such as poor lighting or when there are many disturbances such as rain, there is a decrease in the success rate of license plate recognition. Still, the proposed method's experimental results were higher than the method without deblurring by 1.7 %. There is still unsuccessful in recognizing license plates from the whole experiment due to a lot of noise. The noise can occur due to unfavourable environmental conditions such as heavy rain