Heterogeneous 2.5D integration on through silicon interposer

© 2015 AIP Publishing LLC. Driven by the need to reduce the power consumption of mobile devices, and servers/data centers, and yet continue to deliver improved performance and experience by the end consumer of digital data, the semiconductor industry is looking for new technologies for manufacturing integrated circuits (ICs). In this quest, power consumed in transferring data over copper interconnects is a sizeable portion that needs to be addressed now and continuing over the next few decades. 2.5D Through-Si-Interposer (TSI) is a strong candidate to deliver improved performance while consuming lower power than in previous generations of servers/data centers and mobile devices. These low-power/high-performance advantages are realized through achievement of high interconnect densities on the TSI (higher than ever seen on Printed Circuit Boards (PCBs) or organic substrates), and enabling heterogeneous integration on the TSI platform where individual ICs are assembled at close proximity

Self-Aligned 3D Chip Integration Technology and Through-Silicon Serial Data Transmission

The emerging three-dimensional (3D) integration technology is expected to lead to an industry paradigm shift due to its tremendous benefits. Intense research activities are going on about technology, simulation, design, and product prototypes. This thesis work aims at fabricating through-silicon vias (TSVs) on diced processor chips, and later bonding them into a 3D-stacked chip. How to handle and process delicate processor chips with high alignment precision is a key issue. The TSV process to be developed also needs to adapt to this constraint. Four TSV processes have been studied. Among them, the ring-trench TSV process demonstrates the feasibility of fabricating TSVs with the prevailing dimensions, and the whole-through TSV process achieves the first dummy chip post-processed with TSVs in EPFL although the dimension is rather large to keep a reasonable aspect ratio (AR). Four self-alignment (SA) techniques have been investigated, among which the gravitational SA and the hydrophobic SA are found to be quite promising. Using gravitational SA, we come to the conclusion that cavities in silicon carrier wafer with a profile angle of 60° can align the chips with less than 20 µm inaccuracies. The alignment precision can be improved after adopting more advanced dicing tools instead of using the traditional dicing saws and larger cavity profile angle. Such inaccuracy will be sufficient to align the relatively large TSVs for general products such as 3D image sensors. By fabricating bottom TSVs in the carrier wafer, a 3D silicon interposer idea has been proposed to stack another chip, e.g. a processor chip, on the other side of the carrier wafer. But stacking microprocessor chips fabricated with TSVs will require higher alignment precision. A hydrophobic SA technique using the surface tension force generated by the water-to-air interfaces around the pads can greatly reduce the alignment inaccuracy to less than 1 µm. This low-cost and high throughput SA procedure is processed in air, fully-compatible with current fabrication technologies, and highly stable and repeatable. We present a theoretical meniscus model to predict SA results and to provide the design rules. This technique is quite promising for advanced 3D applications involving logic and heterogeneous stacking. As TSVs' dimensions in the chip-level 3D integration are constrained by the chip-level processes, such as bonding, the smallest TSVs might still be about 5 µm. Thus, the area occupied by the TSVs cannot be neglected. Fortunately, TSVs can withstand very high bandwidths, meaning that data can be serialized and transmitted using less numbers of TSVs. With 20 µm TSVs, the 2-Gb/s 8:1 serial link implemented saves 75% of the area of its 8-bit parallel counterpart. The quasi-serial link proposed can effectively balance the inter-layer bandwidth and the serial links' area consumption. The area model of the serial or quasi-serial links working under higher frequencies provides some guidelines to choose the proper serial link design, and it also predicts that when TSV diameter shrinks to 5 µm, it will be difficult to keep this area benefit if without some novel circuit design techniques. As the serial links can be implemented with less area, the bandwidth per unit area is increased. Two scenarios are studied, single-port memory access and multi-port memory access. The expanded inter-layer bandwidth by serialization does not improve the system performance because of the bus-bottleneck problem. In the latter scenario, the inter-layer ultra-wide bandwidth can be exploited as each memory bank can be accessed randomly through the NoC. Thus further widening the inter-layer bandwidth through serialization, the system performance will be improved

Nanowires for 3d silicon interconnection – low temperature compliant nanowire-polymer film for z-axis interconnect

Semiconductor chip packaging has evolved from single chip packaging to 3D heterogeneous system integration using multichip stacking in a single module. One of the key challenges in 3D integration is the high density interconnects that need to be formed between the chips with through-silicon-vias (TSVs) and inter-chip interconnects. Anisotropic Conductive Film (ACF) technology is one of the low-temperature, fine-pitch interconnect method, which has been considered as a potential replacement for solder interconnects in line with continuous scaling of the interconnects in the IC industry. However, the conventional ACF materials are facing challenges to accommodate the reduced pad and pitch size due to the micro-size particles and the particle agglomeration issue. A new interconnect material - Nanowire Anisotropic Conductive Film (NW-ACF), composed of high density copper nanowires of ~ 200 nm diameter and 10-30 µm length that are vertically distributed in a polymeric template, is developed in this work to tackle the constrains of the conventional ACFs and serves as an inter-chip interconnect solution for potential three-dimensional (3D) applications

Solid State Circuits Technologies

The evolution of solid-state circuit technology has a long history within a relatively short period of time. This technology has lead to the modern information society that connects us and tools, a large market, and many types of products and applications. The solid-state circuit technology continuously evolves via breakthroughs and improvements every year. This book is devoted to review and present novel approaches for some of the main issues involved in this exciting and vigorous technology. The book is composed of 22 chapters, written by authors coming from 30 different institutions located in 12 different countries throughout the Americas, Asia and Europe. Thus, reflecting the wide international contribution to the book. The broad range of subjects presented in the book offers a general overview of the main issues in modern solid-state circuit technology. Furthermore, the book offers an in depth analysis on specific subjects for specialists. We believe the book is of great scientific and educational value for many readers. I am profoundly indebted to the support provided by all of those involved in the work. First and foremost I would like to acknowledge and thank the authors who worked hard and generously agreed to share their results and knowledge. Second I would like to express my gratitude to the Intech team that invited me to edit the book and give me their full support and a fruitful experience while working together to combine this book

Improved noise coupling performance using optimized Teflon liner with different TSV structures for 3D IC integration

In this paper, performance of noise coupling is studied using conventional SiO2 liner and Teflon AF1600 liner over different TSV structures (using only liner and liner surrounded by p+ guard ring). We have taken an optimized liner thickness of 0.15 μm and remaining metal filler as Cu for the entire simulation purpose. Our result confirms significant improvement in noise coupling using liners made up of Teflon AF1600 as compared to the conventional SiO2 liners in case of both proposed TSV structures. Also, Teflon AF1600 offers improved noise coupling performance than conventional SiO2 as liner in both proposed TSV structures at higher frequency. So Teflon AF1600 can be an ideal contender as a liner material for via last process of TSV fabrication

Mu2e Technical Design Report

The Mu2e experiment at Fermilab will search for charged lepton flavor violation via the coherent conversion process mu- N --> e- N with a sensitivity approximately four orders of magnitude better than the current world's best limits for this process. The experiment's sensitivity offers discovery potential over a wide array of new physics models and probes mass scales well beyond the reach of the LHC. We describe herein the preliminary design of the proposed Mu2e experiment. This document was created in partial fulfillment of the requirements necessary to obtain DOE CD-2 approval.Comment: compressed file, 888 pages, 621 figures, 126 tables; full resolution available at http://mu2e.fnal.gov; corrected typo in background summary, Table 3.

Wideband vibration energy harvesting using electromagnetic transduction for powering internet of things

The ‘Internet of Things-(IoT)’ envisions a world scattered with physical sensors that collect and transmit data about almost anything and thereby enabling intelligent decision-making for a smart environment. While technological advancements have reduced the power consumption of such devices significantly, the problem of perpetual energy supply beyond the limited capability of batteries is a bottleneck to this vision which is yet to be resolved. This issue has surged the research to investigate the prospect of harvesting the energy out of ambient mechanical vibrations. However, limited applications of conventional resonant devices under most practical environments involving frequency varying inputs, has gushed the research on wideband transducers recently. To facilitate multi-frequency operation at low-frequency regime, design innovations of the Silicon-onInsulator based MEMS suspension systems are performed through multi-modal activation. For continuous bandwidth widening, the benefits of using nonlinear stiffness in the system dynamics are investigated. By topologically varying the spring architectures, dramatically improved operational bandwidth with large power-density is obtained, which is benchmarked using a novel figure-of-merit. However, the fundamental phenomenon of multi-stability limits many nonlinear oscillator based applications including energy harvesting. To address this, an electrical control mechanism is introduced which dramatically improves the energy conversion efficiency over a wide bandwidth in a frequencyamplitude varying environment using only a small energy budget. The underlying effects are independent of the device-scale and the transduction methods, and are explained using a modified Duffing oscillator model. One of the key requirements for fully integrated electromagnetic transducers is the CMOS compatible batch-fabrication of permanent magnets with large energy-product. In the final module of the works, nano-structured CoPtP hard-magnetic material with large coercivity is developed at room-temperature using a current modulated electro-deposition technique. The demagnetization fields of the magnetic structures are minimized through optimized micro-patterns which enable the full integration of high performance electromagnetic energy harvesters

Manufacturing of three dimensional integrated circuits

Thesis (Ph. D.)--Massachusetts Institute of Technology, Dept. of Materials Science and Engineering, 2007.Includes bibliographical references (p. 221-231).Along with scaling down in size, novel materials have been introduced into the semiconductor industry to enable continued improvements in performance and cost as predicted by Moore's law. It has become important now more than ever to include an environmental impact evaluation of future technologies, before they are introduced into manufacturing, in order to identify potentially environmentally harmful materials or processes and understand their implications, costs, and mitigation requirements. In this thesis, we introduce a methodology to compare alternative options on the environmental axis, along with the cost and performance axes, in order to create environmentally aware and benign technologies. This methodology also helps to identify potential performance and cost issues in novel technologies by taking a transparent and bottoms-up assessment approach. This methodology is applied to the evaluation of the MIT 3D IC technology in comparison to a standard CMOS 2D IC approach. Both options are compared on all three axes - performance, cost and environmental impact.(cont.) The "handle wafer" unit process in the existing 3D IC technology, which is a crucial process for back-to-face integration, is found to have a large environmental impact because of its use of thick metal sacrificial layers and high energy consumption. We explore three different handle wafer options, between-die channel, oxide release layer, and alternative low-temperature permanent bonding. The first two approaches use a chemical handle wafer release mechanism; while the third explores solid liquid inter-diffusion (SLID) bonding using copper-indium at 2000C. Preliminary results for copper-indium bonding indicate that a sub-micron thick multi-layer copper-indium stack, when bonded to a 300 nm thick copper film results in large voids in the bonding interface primarily due to rough as-deposited films. Finally, we conduct an overall assessment of these and other proposed handle wafer technologies. The overall assessment shows that but the oxide release layer approach appears promising; however, each process option has its strength and weaknesses, which need to be understood and pursued accordingly.by Ajay Somani.Ph.D

Study of a Non-Equilibrium Plasma Pinch with Application for Microwave Generation

The Non-Equilibrium Plasma Pinch (NEPP), also known as the Dense Plasma Focus (DPF) is well known as a source of energetic ions, relativistic electrons and neutrons as well as electromagnetic radiation extending from the infrared to X-ray. In this dissertation, the operation of a 15 kJ, Mather type, NEPP machine is studied in detail. A large number of experiments are carried out to tune the machine parameters for best performance using helium and hydrogen as filling gases. The NEPP machine is modified to be able to extract the copious number of electrons generated at the pinch. A hollow anode with small hole at the flat end, and a mock magnetron without biasing magnetic field are built. The electrons generated at the pinch are very difficult to capture, therefore a novel device is built to capture and transport the electrons from the pinch to the magnetron. The novel cup-rod-needle device successfully serves the purpose to capture and transport electrons to monitor the pinch current. Further, the device has the potential to field emit charges from its needle end acting as a pulsed electron source for other devices such as the magnetron. Diagnostics tools are designed, modeled, built, calibrated, and implemented in the machine to measure the pinch dynamics. A novel, UNLV patented electromagnetic dot sensors are successfully calibrated, and implemented in the machine. A new calibration technique is developed and test stands designed and built to measure the dot\u27s ability to track the impetus signal over its dynamic range starting and ending in the noise region. The patented EM-dot sensor shows superior performance over traditional electromagnetic sensors, such as Rogowski coils. On the other hand, the cup-rod structure, when grounded on the rod side, serves as a diagnostic tool to monitor the pinch current by sampling the actual current, a quantity that has been always very challenging to measure without perturbing the pinch. To the best of our knowledge, this method of measuring the pinch current is unique and has never been done before. Agreement with other models is shown. The operation of the NEPP machine with the hole in the center of the anode and the magnetron connected including the cup-rod structure is examined against the NEPP machine signature with solid anode. Both cases showed excellent agreement. This suggests that the existence of the hole and the diagnostic tool inside the anode have negligible effects on the pinch

Analysis of electric propulsion electrical power conditioning component technology. Volume 1 - Data bank Final report

Analysis of electric propulsion electric power conditioning component technology - data revie