121,470 research outputs found

    Improved bounds for reduction to depth 4 and depth 3

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    Koiran showed that if a nn-variate polynomial of degree dd (with d=nO(1)d=n^{O(1)}) is computed by a circuit of size ss, then it is also computed by a homogeneous circuit of depth four and of size 2O(dlog(d)log(s))2^{O(\sqrt{d}\log(d)\log(s))}. Using this result, Gupta, Kamath, Kayal and Saptharishi gave a exp(O(dlog(d)log(n)log(s)))\exp(O(\sqrt{d\log(d)\log(n)\log(s)})) upper bound for the size of the smallest depth three circuit computing a nn-variate polynomial of degree d=nO(1)d=n^{O(1)} given by a circuit of size ss. We improve here Koiran's bound. Indeed, we show that if we reduce an arithmetic circuit to depth four, then the size becomes exp(O(dlog(ds)log(n)))\exp(O(\sqrt{d\log(ds)\log(n)})). Mimicking Gupta, Kamath, Kayal and Saptharishi's proof, it also implies the same upper bound for depth three circuits. This new bound is not far from optimal in the sense that Gupta, Kamath, Kayal and Saptharishi also showed a 2Ω(d)2^{\Omega(\sqrt{d})} lower bound for the size of homogeneous depth four circuits such that gates at the bottom have fan-in at most d\sqrt{d}. Finally, we show that this last lower bound also holds if the fan-in is at least d\sqrt{d}

    Improved Pseudorandom Generators from Pseudorandom Multi-Switching Lemmas

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    We give the best known pseudorandom generators for two touchstone classes in unconditional derandomization: an ε\varepsilon-PRG for the class of size-MM depth-dd AC0\mathsf{AC}^0 circuits with seed length log(M)d+O(1)log(1/ε)\log(M)^{d+O(1)}\cdot \log(1/\varepsilon), and an ε\varepsilon-PRG for the class of SS-sparse F2\mathbb{F}_2 polynomials with seed length 2O(logS)log(1/ε)2^{O(\sqrt{\log S})}\cdot \log(1/\varepsilon). These results bring the state of the art for unconditional derandomization of these classes into sharp alignment with the state of the art for computational hardness for all parameter settings: improving on the seed lengths of either PRG would require breakthrough progress on longstanding and notorious circuit lower bounds. The key enabling ingredient in our approach is a new \emph{pseudorandom multi-switching lemma}. We derandomize recently-developed \emph{multi}-switching lemmas, which are powerful generalizations of H{\aa}stad's switching lemma that deal with \emph{families} of depth-two circuits. Our pseudorandom multi-switching lemma---a randomness-efficient algorithm for sampling restrictions that simultaneously simplify all circuits in a family---achieves the parameters obtained by the (full randomness) multi-switching lemmas of Impagliazzo, Matthews, and Paturi [IMP12] and H{\aa}stad [H{\aa}s14]. This optimality of our derandomization translates into the optimality (given current circuit lower bounds) of our PRGs for AC0\mathsf{AC}^0 and sparse F2\mathbb{F}_2 polynomials

    On the power of homogeneous depth 4 arithmetic circuits

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    We prove exponential lower bounds on the size of homogeneous depth 4 arithmetic circuits computing an explicit polynomial in VPVP. Our results hold for the {\it Iterated Matrix Multiplication} polynomial - in particular we show that any homogeneous depth 4 circuit computing the (1,1)(1,1) entry in the product of nn generic matrices of dimension nO(1)n^{O(1)} must have size nΩ(n)n^{\Omega(\sqrt{n})}. Our results strengthen previous works in two significant ways. Our lower bounds hold for a polynomial in VPVP. Prior to our work, Kayal et al [KLSS14] proved an exponential lower bound for homogeneous depth 4 circuits (over fields of characteristic zero) computing a poly in VNPVNP. The best known lower bounds for a depth 4 homogeneous circuit computing a poly in VPVP was the bound of nΩ(logn)n^{\Omega(\log n)} by [LSS, KLSS14].Our exponential lower bounds also give the first exponential separation between general arithmetic circuits and homogeneous depth 4 arithmetic circuits. In particular they imply that the depth reduction results of Koiran [Koi12] and Tavenas [Tav13] are tight even for reductions to general homogeneous depth 4 circuits (without the restriction of bounded bottom fanin). Our lower bound holds over all fields. The lower bound of [KLSS14] worked only over fields of characteristic zero. Prior to our work, the best lower bound for homogeneous depth 4 circuits over fields of positive characteristic was nΩ(logn)n^{\Omega(\log n)} [LSS, KLSS14]

    Blackbox identity testing for bounded top fanin depth-3 circuits: the field doesn't matter

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    Let C be a depth-3 circuit with n variables, degree d and top fanin k (called sps(k,d,n) circuits) over base field F. It is a major open problem to design a deterministic polynomial time blackbox algorithm that tests if C is identically zero. Klivans & Spielman (STOC 2001) observed that the problem is open even when k is a constant. This case has been subjected to a serious study over the past few years, starting from the work of Dvir & Shpilka (STOC 2005). We give the first polynomial time blackbox algorithm for this problem. Our algorithm runs in time poly(nd^k), regardless of the base field. The only field for which polynomial time algorithms were previously known is F=Q (Kayal & Saraf, FOCS 2009, and Saxena & Seshadhri, FOCS 2010). This is the first blackbox algorithm for depth-3 circuits that does not use the rank based approaches of Karnin & Shpilka (CCC 2008). We prove an important tool for the study of depth-3 identities. We design a blackbox polynomial time transformation that reduces the number of variables in a sps(k,d,n) circuit to k variables, but preserves the identity structure.Comment: 14 pages, 1 figure, preliminary versio

    Progress on Polynomial Identity Testing - II

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    We survey the area of algebraic complexity theory; with the focus being on the problem of polynomial identity testing (PIT). We discuss the key ideas that have gone into the results of the last few years.Comment: 17 pages, 1 figure, surve
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