OFLOPS-Turbo: Testing the next-generation OpenFlow switch

The heterogeneity barrier breakthrough achieved by the OpenFlow protocol is currently paced by the variability in performance semantics among network devices, which reduces the ability of applications to take complete advantage of programmable control. As a result, control applications remain conservative on performance requirements in order to be generalizable and trade performance for explicit state consistency in order to support varying performance behaviours. In this paper we argue that network control must be optimized towards network device capabilities and network managers and application developers must perform informed design decision using accurate switch performance profiles. This becomes highly critical for modern OpenFlow-enabled 10 GbE optical switches which significantly elevate switch performance requirements. We present OFLOPS-Turbo, the integration of the OFLOPS switch evaluation platform, with the OSNT platform, a hardware-accelerated traffic generation and capture system supporting lossless 10 GbE functionality. Using OFLOPS-Turbo, we conduct an evaluation of flow table manipulation capabilities in a representative collection of 10 GbE production OpenFlow switch devices and interpret the evolution of OpenFlow support by comparison with historical data.This work was jointly supported by the EPSRC INTERNET Project EP/H040536/1 and the Defense Advanced Research Projects Agency (DARPA) and the Air Force Research Laboratory (AFRL), under contract FA8750-11- C-0249. The views, opinions, and/or findings contained in this article/presentation are those of the author/ presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the Defense Advanced Research Projects Agency or the Department of Defense.This is the final version of the article. It first appeared from IEEE via http://dx.doi.org/10.1109/ICC.2015.724921

An open testing framework for next-generation openflow switches

The deployment experience of OpenFlow support in production networks has highlighted variable limitations between network devices and vendors, while the recent integration of OpenFlow control abstractions in 10 GbE switches, increases further the performance requirements to support the switch control plane. This paper presents OFLOPS-Turbo, an effort to integrate OFLOPS, the OpenFlow switch evaluation platform, with OSNT, a hardware-accelerated traffic generation and capture system

Planning and Implantation of NetFPGA Platform on Network Emulation Testbed

The concepts of cloud computing and Internet applications have expanded gradually and have become more and more important. Researchers need a new, high-speed network to build experimental environments for testing new network protocolswithout affecting existing traffic. In this paper, we describe a way to integrate NetFPGA platform, OpenFlow concept and NetFPGA reference designs into anetwork testbed to improve the packet processing speed and the dynamic adjustability for network emulation experiments. Furthermore, combined with Tunneling and VPLS, the proposed network testbed can be connected to distributed network, thus providing researchers a traffic-controllable and NIC-programmable experimental networking testbed in intra-communicating part

Blueswitch: Enabling provably consistent configuration of network switches

Previous research on consistent updates for distributed network configurations has focused on solutions for centralized networkconfiguration controllers. However, such work does not address the complexity of modern switch datapaths. Modern commodity switches expose opaque configuration mechanisms, with minimal guarantees for datapath consistency and with unclear configuration semantics. Furthermore, would-be solutions for distributed consistent updates must take into account the configuration guarantees provided by each individual switch – plus the compositional problems of distributed control and multi-switch configurations that considerably transcend the single-switch problems. In this paper, we focus on the behavior of individual switches, and demonstrate that even simple rule updates result in inconsistent packet switching in multi-table datapaths. We demonstrate that consistent configuration updates require guarantees of strong switch-level atomicity from both hardware and software layers of switches – even in a single switch. In short, the multiple-switch problems cannot be reasonably approached until single-switch consistency can be resolved. We present a hardware design that supports a transactional configuration mechanism, and provides packet-consistent configuration: all packets traversing the datapath will encounter either the old configuration or the new one, and never an inconsistent mix of the two. Unlike previous work, our design does not require modifications to network packets. We precisely specify the hardwaresoftware protocol for switch configuration; this enables us to prove the correctness of the design, and to provide well-specified invariants that the software driver must maintain for correctness. We implement our prototype switch design using the NetFPGA-10G hardware platform, and evaluate our prototype against commercial off-the-shelf switches.This work was jointly supported by the Defense Advanced Research Projects Agency (DARPA) and the Air Force Research Laboratory (AFRL), under contract FA8750-11-C-0249. The views, opinions, and/or findings contained in this article/presentation are those of the author/ presenter and should not be interpreted as representing the official views or policies, either expressed or implied, of the Department of Defense or the U.S. Government. We also acknowledge the support of the UK EPSRC for contributing to parts of our work, through grant EP/H040536/1. Additional data related to this publication is available at the http://www.cl.cam.ac. uk/research/srg/netfpga/blueswitch/ data repository.This is the author accepted manuscript. The final version is available from IEEE via http://dx.doi.org/10.1109/ANCS.2015.711011

Implementation of ARP-Path Low Latency Bridges in Linux and OpenFlow/NetFPGA

2011 IEEE 12th International Conference on High Performance Switching and Routing took place July 4-6, 2011 in Cartagena, Spain. This event web site is: http://ieeexplore.ieee.org/xpl/mostRecentIssue.jsp?punumber=5976787This paper describes the implementation of ARPPath (a.k.a. FastPath) bridges, a recently proposed concept for low latency bridges, in Linux/Soekris and OpenFlow/NetFPGA platforms. These ARP-based Ethernet Switches rely on the race between the replicas of a standard ARP Request packet flooded over all links, to discover the minimum latency path to the destination host, complemented in the opposite direction by the ARP Reply packet directed to the source host. Implementations show that the protocol is loop free, does not block links, is fully transparent to hosts and neither needs a spanning tree protocol to prevent loops nor a link state protocol to obtain low latency paths. Implementations in Linux and OpenFlow on NetFPGA show inherent robustness and fast reconfiguration. Previous simulations showed a superior performance (throughput and delay) than the Spanning Tree Protocol and similar to shortest path routing, with lower complexityThis work was supported in part by grants from Comunidad de Madrid and Comunidad de Castilla la Mancha through Projects MEDIANET-CM (S-2009/TIC-1468), EMARECE (PII1I09-0204-4319) and T2C2(TIN2008-06739-C04-04).Publicad