Network Automata: Coupling structure and function in real-world networks

We introduce Network Automata, a framework which couples the topological evolution of a network to its structure. It is useful for dealing with networks in which the topology evolves according to some specified microscopic rules and, simultaneously, there is a dynamic process taking place on the network that both depends on its structure but is also capable of modifying it. It is a generic framework for modeling systems in which network structure, dynamics, and function are interrelated. At the practical level, this framework allows for easy implementation of the microscopic rules involved in such systems. To demonstrate the approach, we develop a class of simple biologically inspired models of fungal growth.Comment: 7 pages, 5 figures, 1 tables. Revised content - surplus text and figures remove

Fsimac: a fault simulator for asynchronous sequential circuits

Journal ArticleAt very high frequencies, the major potential of asynchronous circuits is absence of clock skew and, through that, better exploitation of relative timing relations. This paper presents Fsimac, a gate-level fault simulator for stuck-at and gate-delay faults in asynchronous sequential circuits. Fsimac not only evaluates combinational logic and typical asynchronous gates such as Muller C-elements, but also complex domino gates, which are widely used in high-speed designs. Our algorithm for detecting feedback loops is designed so as to minimize the iterations for simulating the unfolded circuit. We use min-max timing analysis to compute the bounds on the signal delays. Stuck-at faults are detected by comparing logic values at the primary outputs against the corresponding values in the fault-free design. For delay faults, we additionally compare min-max time stamps for primary output signals. Fault coverage reported by Fsimac for pseudo-random tests generated by Cellular Automata show some very good results, but also indicate test holes for which more specific patterns are needed. We intend to deploy Fsimac for designing more effective CA-BIST