Medical microprocessor systems

The practical classes and laboratory work in the discipline "Medical microprocessor systems", performed using software in the programming environment of microprocessors Texas Instruments (Code Composer Studio) and using of digital microprocessors of the Texas Instruments DSK6400 family, and models of electrical equipment in the environment of graphical programming LabVIEW 2010.Лабораторний практикум з програмування та побудови медичних мікропроцесорних систем, який викладено у навчальному посібнику допомагає накопичувати й ефективно використовувати отриману інформацію з теоретичного курсу на всіх стадіях навчального процесу, що є важливим для підготовки магістрів та необхідною ланкою у науковому пізнанні практичних основ біомедичної електроніки.The laboratory workshop on the programming and construction of medical microprocessor systems, which is outlined in the tutorial, helps to accumulate and effectively use the information obtained from a theoretical course at all stages of the educational process, which is important for the preparation of masters and a necessary link in the scientific knowledge of the practical basics of biomedicine.Лабораторный практикум по программированию и построению медицинских микропроцессорных систем, который изложен в учебном пособии помогает накапливать и эффективно использовать полученную информацию из теоретического курса на всех стадиях учебного процесса, что важно для подготовки магистров и является необходимым звеном в научном познании практических основ биомедицинской электроники

Digital signal processor fundamentals and system design

Digital Signal Processors (DSPs) have been used in accelerator systems for more than fifteen years and have largely contributed to the evolution towards digital technology of many accelerator systems, such as machine protection, diagnostics and control of beams, power supply and motors. This paper aims at familiarising the reader with DSP fundamentals, namely DSP characteristics and processing development. Several DSP examples are given, in particular on Texas Instruments DSPs, as they are used in the DSP laboratory companion of the lectures this paper is based upon. The typical system design flow is described; common difficulties, problems and choices faced by DSP developers are outlined; and hints are given on the best solution

Breathfinding: A Wireless Network that Monitors and Locates Breathing in a Home

This paper explores using RSS measurements on many links in a wireless network to estimate the breathing rate of a person, and the location where the breathing is occurring, in a home, while the person is sitting, laying down, standing, or sleeping. The main challenge in breathing rate estimation is that "motion interference", i.e., movements other than a person's breathing, generally cause larger changes in RSS than inhalation and exhalation. We develop a method to estimate breathing rate despite motion interference, and demonstrate its performance during multiple short (3-7 minute) tests and during a longer 66 minute test. Further, for the same experiments, we show the location of the breathing person can be estimated, to within about 2 m average error in a 56 square meter apartment. Being able to locate a breathing person who is not otherwise moving, without calibration, is important for applications in search and rescue, health care, and security

VLSI design and FPGA-based prototyping of a buffered serial port for audio applications

The present market of semiconductor is very competitive; on one side consumers ask for always increasing performance and new possibilities, on the other companies have to offer low prices in order to be successful. For what concerns performance just think of the wide range of mobile applications, such as PDAs, cellular phones, and laptops : quality of services, duration of the battery and computational power are always taken into account when buying new devices. On the other side, due to the competition, costs have to be very low; this means that both recursive and non-recursive engineering costs have to be kept under control. Time is another important concern: it is usually true that the earlier a product is presented to the market, the wider share of the market it will gain. This leads modern semiconductor companies to look for viable ways to design improved products in a short time. Because of the complexity of the new electronic systems, this is not an easy task to be accomplished; even tough electronic design automation (EDA) tools have greatly improved in the recent years, a gap still exists between the rate foundries can produce chips and the rate these chips can be designed. A very common approach to deal with complexity and performance requirements is to integrate as many functions as possible on a single chip (System-On-Chip); this allows higher clock frequency and lower costs. In connection to this also design reuse has spread in a great part of semiconductor world. This means using in your system modules that others have already designed and tested. This allows you to skip some steps in the design flow (at least for those modules) and saving a significant amount of time. In this framework lies the work of my thesis, developed at the StarCore, a company headquartered in Austin, Texas. StarCore designs and licences Digital Signal Processors as intellectual property; this is basically one of the companies that offer its product to be used in other electronic systems, avoiding licensees to spend time in designing it by themselves. A Digital Signal Processor is a special kind of processor, designed to execute calculus-intensive applications: encoding and decoding of information, voice synthesis and recognition, compression and decompression of data, Fourier Transform are just some examples. In many systems, thanks to its programmability and its limited cost it is the suitable solution. For example most mobile phones employs a DSP processor to perform base band operation on the signal. In these kind of systems, it is important that very few cycles are spent doing other than signal processing, such as dealing with peripherals. In the case of an audio signal it is important that the audio port asks for the fewer cycle it is possible. For this reason at StarCore my activity was to design and develop an audio port controller aiming to reduce at least the cycles asked to the processor in case that the algorithm run is frame based. For this purpose I designed hardware to be mapped into an FPGA, and wrote some software for the DSP; I worked mainly with the Development Board, used to prototype applications based on the StarCore processor

A Small Acoustic Goniometer for General Purpose Research

Understanding acoustic events and monitoring their occurrence is a useful aspect of many research projects. In particular, acoustic goniometry allows researchers to determine the source of an event based solely on the sound it produces. The vast majority of the acoustic goniometry research projects used custom hardware targeted to the specific application under test. Unfortunately, due to the wide range of sensing applications, a flexible general purpose hardware/firmware system does not exist for this research. This dissertation focuses on the development of such a system which encourages the continued exploration of general purpose hardware/firmware and lowers barriers to research in projects requiring the use of acoustic goniometry. Simulations have been employed to verify system feasibility, and a complete hardware implementation of the acoustic goniometer has been designed and field tested. The results are reported, and suggested areas for improvement and further exploration are discussed

A 64mW DNN-based Visual Navigation Engine for Autonomous Nano-Drones

Fully-autonomous miniaturized robots (e.g., drones), with artificial intelligence (AI) based visual navigation capabilities are extremely challenging drivers of Internet-of-Things edge intelligence capabilities. Visual navigation based on AI approaches, such as deep neural networks (DNNs) are becoming pervasive for standard-size drones, but are considered out of reach for nanodrones with size of a few cm${}^\mathrm{2}$. In this work, we present the first (to the best of our knowledge) demonstration of a navigation engine for autonomous nano-drones capable of closed-loop end-to-end DNN-based visual navigation. To achieve this goal we developed a complete methodology for parallel execution of complex DNNs directly on-bard of resource-constrained milliwatt-scale nodes. Our system is based on GAP8, a novel parallel ultra-low-power computing platform, and a 27 g commercial, open-source CrazyFlie 2.0 nano-quadrotor. As part of our general methodology we discuss the software mapping techniques that enable the state-of-the-art deep convolutional neural network presented in [1] to be fully executed on-board within a strict 6 fps real-time constraint with no compromise in terms of flight results, while all processing is done with only 64 mW on average. Our navigation engine is flexible and can be used to span a wide performance range: at its peak performance corner it achieves 18 fps while still consuming on average just 3.5% of the power envelope of the deployed nano-aircraft.Comment: 15 pages, 13 figures, 5 tables, 2 listings, accepted for publication in the IEEE Internet of Things Journal (IEEE IOTJ