Implementation of a Synchronized Oscillator Circuit for Fast Sensing and Labeling of Image Objects

We present an application-specific integrated circuit (ASIC) CMOS chip that implements a synchronized oscillator cellular neural network with a matrix size of 32 × 32 for object sensing and labeling in binary images. Networks of synchronized oscillators are a recently developed tool for image segmentation and analysis. Its parallel network operation is based on a “temporary correlation” theory that attempts to describe scene recognition as if performed by the human brain. The synchronized oscillations of neuron groups attract a person’s attention if he or she is focused on a coherent stimulus (image object). For more than one perceived stimulus, these synchronized patterns switch in time between different neuron groups, thus forming temporal maps that code several features of the analyzed scene. In this paper, a new oscillator circuit based on a mathematical model is proposed, and the network architecture and chip functional blocks are presented and discussed. The proposed chip is implemented in AMIS 0.35 μm C035M-D 5M/1P technology. An application of the proposed network chip for the segmentation of insulin-producing pancreatic islets in magnetic resonance liver images is presented

Test Procedures for Synchronized Oscillators Network CMOS VLSI Chip

The paper presents test procedures designed for application-specific integrated circuit (ASIC) CMOS VLSI chip that implements a synchronized oscillator neural network with a matrix size of 32×32 for object detecting in binary images. Networks of synchronized oscillators are recently developed tool for image segmentation and analysis. This paper briefly introduces synchronized oscillators network. Basic chip analog building blocks with their test procedures and measurements results are presented. In order to do measurements, special basic building blocks test structures have been implemented in the chip. It let compare Spectre simulations results to measurements results. Moreover, basic chip analog building blocks measurements give precious information about their imperfections caused by MOS transistor mismatch. This information is very usable during design and improvement of a special setup for chip functional tests. Improvement of the setup is a digitally assisted analog technique. It is an idea of oscillators tuning procedure. Such setup, oscillators tuning procedure and segmentation of a sample binary image are presented

Implementation of FPGA-based star tracker pre-processing pipeline

The processing pipeline for a star tracker requires computation within various problem domains. The first stage of star detection and tracking is to extract star features from image data. The image processing, described as the pre-processing pipeline, is implemented and documented in this thesis. The goal is to provide a theoretical basis of hardware aspects, image processing, and star tracker systems to support the design choices made for the pre-processing pipeline. The hardware design is built for a Xilinx 7-series FPGA, functioning as a testbed for the pre-processing pipeline. The Opal Kelly XEM7305 module provides the components, such as power, clock, SDRAM, and a communication channel to the FPGA. The system requirements form the high level goals of the pre-processing pipeline. The requirements create a framework for the FPGA design to be developed with robust and user-friendly engineering principles. The requirements are implemented in a design consisting of a computation unit, communication unit, memory control unit, and client-PC software. Extracted stars are rendered on top of images provided to the pre-processing pipeline. The successful extraction of stars can be verified through the client soft- ware. The processing time of an image is satisfactory, with a very low variation. This is a precondition for integration with other star tracker components, when following the principle of predictability. The performance of the most complex part of the computation unit, the CCL process, is compared to high performance software implementations. A satisfactory result is concluded when the software execution is put to scale with the lower clock speed of the hardware implementation. The resource use of the FPGA, provided by the Xilinx Vivado design suite, is reviewed with the conclusion being that the FPGA part fits the design well with a high utilization rate of LUTs and BRAM. Parallelization could be increased to utilize more DSP blocks for faster results

NASA Tech Briefs, July 2011

Topics covered include: 1) Collaborative Clustering for Sensor Networks; 2) Teleoperated Marsupial Mobile Sensor Platform Pair for Telepresence Insertion Into Challenging Structures; 3) Automated Verification of Spatial Resolution in Remotely Sensed Imagery; 4) Electrical Connector Mechanical Seating Sensor; 5) In Situ Aerosol Detector; 6) Multi-Parameter Aerosol Scattering Sensor; 7) MOSFET Switching Circuit Protects Shape Memory Alloy Actuators; 8) Optimized FPGA Implementation of Multi-Rate FIR Filters Through Thread Decomposition; 9) Circuit for Communication Over Power Lines; 10) High-Efficiency Ka-Band Waveguide Two-Way Asymmetric Power Combiner; 11) 10-100 Gbps Offload NIC for WAN, NLR, and Grid Computing; 12) Pulsed Laser System to Simulate Effects of Cosmic Rays in Semiconductor Devices; 13) Flight Planning in the Cloud; 14) MPS Editor; 15) Object-Oriented Multi Disciplinary Design, Analysis, and Optimization Tool; 16) Cryogenic-Compatible Winchester Connector Mount and Retaining System for Composite Tubes; 17) Development of Position-Sensitive Magnetic Calorimeters for X-Ray Astronomy; 18) Planar Rotary Piezoelectric Motor Using Ultrasonic Horns; 19) Self-Rupturing Hermetic Valve; 20) Explosive Bolt Dual-Initiated from One Side; 21) Dampers for Stationary Labyrinth Seals; 22) Two-Arm Flexible Thermal Strap; 23) Carbon Dioxide Removal via Passive Thermal Approaches; 24) Polymer Electrolyte-Based Ambient Temperature Oxygen Microsensors for Environmental Monitoring; 25) Pressure Shell Approach to Integrated Environmental Protection; 26) Image Quality Indicator for Infrared Inspections; 27) Micro-Slit Collimators for X-Ray/Gamma-Ray Imaging; 28) Scatterometer-Calibrated Stability Verification Method; 29) Test Port for Fiber-Optic-Coupled Laser Altimeter; 30) Phase Retrieval System for Assessing Diamond Turning and Optical Surface Defects; 31) Laser Oscillator Incorporating a Wedged Polarization Rotator and a Porro Prism as Cavity Mirror; 32) Generic, Extensible, Configurable Push-Pull Framework for Large-Scale Science Missions; 33) Dynamic Loads Generation for Multi-Point Vibration Excitation Problems; 34) Optimal Control via Self-Generated Stochasticity; 35) Space-Time Localization of Plasma Turbulence Using Multiple Spacecraft Radio Links; 36) Surface Contact Model for Comets and Asteroids; 37) Dust Mitigation Vehicle; 38) Optical Coating Performance for Heat Reflectors of the JWST-ISIM Electronic Component; 39) SpaceCube Demonstration Platform; 40) Aperture Mask for Unambiguous Parity Determination in Long Wavelength Imagers; 41) Spaceflight Ka-Band High-Rate Radiation-Hard Modulator; 42) Enabling Disabled Persons to Gain Access to Digital Media; 43) Cytometer on a Chip; 44) Principles, Techniques, and Applications of Tissue Microfluidics; and 45) Two-Stage Winch for Kites and Tethered Balloons or Blimps

Microfluidics for Biosensing and Diagnostics

Efforts to miniaturize sensing and diagnostic devices and to integrate multiple functions into one device have caused massive growth in the field of microfluidics and this integration is now recognized as an important feature of most new diagnostic approaches. These approaches have and continue to change the field of biosensing and diagnostics. In this Special Issue, we present a small collection of works describing microfluidics with applications in biosensing and diagnostics

Radar Technology

In this book “Radar Technology”, the chapters are divided into four main topic areas: Topic area 1: “Radar Systems” consists of chapters which treat whole radar systems, environment and target functional chain. Topic area 2: “Radar Applications” shows various applications of radar systems, including meteorological radars, ground penetrating radars and glaciology. Topic area 3: “Radar Functional Chain and Signal Processing” describes several aspects of the radar signal processing. From parameter extraction, target detection over tracking and classification technologies. Topic area 4: “Radar Subsystems and Components” consists of design technology of radar subsystem components like antenna design or waveform design

Cumulative index to NASA Tech Briefs, 1963-1967

Cumulative index to NASA survey on technology utilization of aerospace research outpu

Historical Building Monitoring Using an Energy-Efficient Scalable Wireless Sensor Network Architecture

We present a set of novel low power wireless sensor nodes designed for monitoring wooden masterpieces and historical buildings, in order to perform an early detection of pests. Although our previous star-based system configuration has been in operation for more than 13 years, it does not scale well for sensorization of large buildings or when deploying hundreds of nodes. In this paper we demonstrate the feasibility of a cluster-based dynamic-tree hierarchical Wireless Sensor Network (WSN) architecture where realistic assumptions of radio frequency data transmission are applied to cluster construction, and a mix of heterogeneous nodes are used to minimize economic cost of the whole system and maximize power saving of the leaf nodes. Simulation results show that the specialization of a fraction of the nodes by providing better antennas and some energy harvesting techniques can dramatically extend the life of the entire WSN and reduce the cost of the whole system. A demonstration of the proposed architecture with a new routing protocol and applied to termite pest detection has been implemented on a set of new nodes and should last for about 10 years, but it provides better scalability, reliability and deployment properties