113 research outputs found

    Local Characterization of Resistance Switching Phenomena in Transition Metal Oxides

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    The development of neuromorphic computing systems that emulate the analog charge states and plasticity of the brainโ€™s neuron-synapse architecture has been a major driver of resistance switching materials exploration. Materials that demonstrate changes in conductance with tunable ratios and volatility of resistance states within a single layer are highly desirable. Although excellent resistance switching device performance has been demonstrated in a range of transition metal oxides, a lack of understanding of the fundamental microscale evolution of a material during resistance switching presents a key limitation to controlling switching parameters. Here, we examine the role of materials defects on local resistance switching structures in two representative transition metal oxide materials: HfOv2 thin films and hydrothermally synthesized VOv2 single crystals. In each material, we seek to clarify the structure of resistance switching domains and the kinetics of domain formation resulting from intentional defect introduction. This thesis is therefore divided into two main parts concerning (1) the introduction of planar defects in HfOv2 filamentary resistance switching devices, and (2) the impact of introduction of point defects on the metal-insulator transition in VOv2 single crystals. Part I (Sections 2 โ€“ 3) details investigation of Cu ion migration rates in Cu/HfOv2/p+Si and Cu/HfOv2/TiN devices in which oxide microstructure varies between amorphous, polycrystalline, and oriented polycrystalline. Ion migration across the oxide layer is shown to be rate limiting and faster in polycrystalline layers than in amorphous HfO2 layers at equivalent electric field. Moreover, the 3D shape of conductive filaments is investigated by a scribing atomic force microscopy experiment in Cu/HfOv2/p+Si devices and reveals a broad range of filament shapes under identical electrical stress conditions. Thermal dissipation is interpreted as the principal determinant of filament area, while oxide microstructure is shown to direct the location of filaments within the device. In part II (Sections 4 โ€“ 5), the hysteresis of the metal-insulator transition (switching volatility) in VOv2 is shown to intrinsically derive from nucleation limited transformations in individual particles. Here, hysteresis is a strong function of particle size, but may be increased or decreased by synthesis techniques that affect the concentration and potency of intrinsic point defects. Upon chemical doping with boron at interstitial lattice sites, a unique kinetic effect on the hysteresis of the current driven metal-insulator transition in two terminal BxVOv2 devices is observed. Dependence of the critical switching current on thermal relaxation time and temperature is characterized and recommendations for further kinetic testing are made. Finally, a few experimental extensions of the work presented in this thesis are made in Section 6

    First-principles study of oxygen vacancy defects in orthorhombic Hf0.5_{0.5}Zr0.5_{0.5}O2_2/SiO2_2/Si gate stack

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    The gate defect of the ferroelectric HfO2_2-based Si field-effect transistor (Si FeFET) plays a dominant role in its reliability issue. The first-principles calculations are an effective method for the atomic-scale understanding of gate defects. However, the first-principles study on the defects of FeFET gate stacks, i.e., metal/orthorhombic-Hf0.5_{0.5}Zr0.5_{0.5}O2_2/SiO2_2/Si structure, has not been reported so far. The key challenge is the construction of metal/orthorhombic-Hf0.5_{0.5}Zr0.5_{0.5}O2_2/SiO2_2/Si gate stack models. Here, we use the Hf0.5_{0.5}Zr0.5_{0.5}O2_2(130) high-index crystal face as the orthorhombic ferroelectric layer and construct a robust atomic structure of the orthorhombic-Hf0.5_{0.5}Zr0.5_{0.5}O2_2/SiO2_2/Si gate stack without any gap states. Its high structural stability is ascribed to the insulated interface. The calculated band offsets show that this gate structure is of the type-I band alignment. Furthermore, the formation energies and charge transition levels (CTLs) of defects reveal that the oxygen vacancy defects are more favorable to form compared with other defects such as oxygen interstitial and Hf/Zr vacancy, and their CTLs are mainly localized near the Si conduction band minimum and valence band maximum, in agreement with the reported experimental results. The oxygen vacancy defects are responsible for charge trapping/de-trapping behavior in Si FeFET. This work provides an insight into gate defects and paves the way to carry out the first-principles study of ferroelectric HfO2_2-based Si FeFET.Comment: 18 pages, 5 figure

    Reliability study of Zr and Al incorporated hf based high-k dielectric deposited by advanced processing

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    Hafnium-based high-x dielectric materials have been successfully used in the industry as a key replacement for SiO2 based gate dielectrics in order to continue CMOS device scaling to the 22-nm technology node. Further scaling according to the device roadmap requires the development of oxides with higher x values in order to scale the equivalent oxide thickness (EOT) to 0.7 nm or below while achieving low defect densities. In addition, next generation devices need to meet challenges like improved channel mobility, reduced gate leakage current, good control on threshold voltage, lower interface state density, and good reliability. In order to overcome these challenges, improvements of the high-x film properties and deposition methods are highly desirable. In this dissertation, a detail study of Zr and Al incorporated HfO2 based high-ฮบ dielectrics is conducted to investigate improvement in electrical characteristics and reliability. To meet scaling requirements of the gate dielectric to sub 0.7 nm, Zr is added to HfO2 to form Hf1-xZrxO2 with x=0, 0.31 and 0.8 where the dielectric film is deposited by using various intermediate processing conditions, like (i) DADA: intermediate thermal annealing in a cyclical deposition process; (ii) DSDS: similar cyclical process with exposure to SPA Ar plasma; and (iii) As-Dep: the dielectric deposited without any intermediate step. MOSCAPs are formed with TiN metal gate and the reliability of these devices is investigated by subjecting them to a constant voltage stress in the gate injection mode. Stress induced flat-band voltage shift (ฮ”VFB), stress induced leakage current (SILC) and stress induced interface state degradation are observed. DSDS samples demonstrate the superior characteristics whereas the worst degradation is observed for DADA samples. Time dependent dielectric breakdown (TDDB) shows that DSDS Hf1-xZrxO2 (x=0.8) has the superior characteristics with reduced oxygen vacancy, which is affiliated to electron affinity variation in HfO2 and ZrO2. The trap activation energy levels estimated from the temperature dependent current voltage characteristics also support the observed reliability characteristics for these devices. In another experiment, HfO2 is lightly doped with Al with a variation in Al concentration by depositing intermediate HfAlOx layers. This work has demonstrated a high quality HfO2 based gate stack by depositing atomic layer deposited (ALD) HfAlOx along with HfO2 in a layered structure. In order to get multifold enhancement of the gate stack quality, both Al percentage and the distribution of Al are observed by varying the HfAlOx layer thickness and it is found that \u3c 2% Al/(Al+Hf)% incorporation can result in up to 18% reduction in the average EOT along with up to 41 % reduction in the gate leakage current as compared to the dielectric with no Al content. On the other hand, excess Al presence in the interfacial layer moderately increases the interface state density (Dit). When devices are stressed in the gate injection mode at a constant voltage stress, dielectrics with Al/(Hf+Al)% \u3c 2% show resistance to stress induced flat-band voltage shift (ฮ”VFB), and stress induced leakage current (SILC). The time dependent dielectric breakdown (TDDB) characteristics show a higher charge to breakdown and an increase in the extracted Weibull slope (ฮฒ) that further confirms an enhanced dielectric reliability for devices with \u3c 2% Al/(Al+Hf)%

    Effect of Surface Variations on Resistive Switching

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    In this chapter, we study factors that dominate the interfacial resistive switching (RS) in memristive devices. We have also given the basic understanding of different type of RS devices which are predominantly interfacial in nature. In case of resistive random access memory (RRAM), the effect of surface properties on the bulk cannot be neglected as thickness of the film is generally below 100ย nm. Surface properties are effected by redox reactions, interfacial layer formation, and presence of tunneling barrier. Surface morphology affects the band structure in the vicinity of interface, which in turn effects the movements of charge carriers. The effect of grain boundaries (GBs) and grain surfaces (GSs) on RS have also been discussed. The concentration of vacancies (Ov)/traps/defects is comparatively higher at GBs which leads to leakage current flow through the GBs predominantly. Such huge presence of charge carriers causes current flow through grain boundaries

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    ํ•™์œ„๋…ผ๋ฌธ(๋ฐ•์‚ฌ) -- ์„œ์šธ๋Œ€ํ•™๊ต๋Œ€ํ•™์› : ์‚ฌ๋ฒ”๋Œ€ํ•™ ๊ณผํ•™๊ต์œก๊ณผ(๋ฌผ๋ฆฌ์ „๊ณต), 2022.2. ์ฑ„์Šน์ฒ .Recent discovery of non-centrosymmetric inversion symmetry-breaking and spontaneous polarization in HfO2 thin films has shed renewed light on the feasibility of ferroelectric logic and memory device applications. Ferroelectric HfO2 is considered an alternative to ferroelectric perovskites because of its compatibility with current complementary metal-oxide-semiconductor (CMOS) technologies and high scalability. A large remnant polarization of 10โ€“40 ฮผC/cm2 can be obtained for HfO2 films with the orthorhombic Pca21 phase. Diverse electric properties with structural changes can be realized via dopant control and electric field cycling. Integration of HfO2 films with the complementary metal-oxide-semiconductor (CMOS) process will aid the development of next-generation non-volatile logic and memory applications. In this dissertation, the distinctive feature of ferroelectric HfO2 and epitaxial integration of ferroelectric HfO2 on the Si substrate will be discussed. First, unprecedented stability in the sub-loop switching behavior and accessibility to intermediate polarization states in ferroelectric Si-doped HfO2 were examined. Through the combination of conventional voltage measurements, hysteresis temperature dependence analysis, piezoelectric force microscopy, first-principles calculations, and Monte Carlo simulations, the unprecedented stability of intermediate states in ferroelectric HfO2 can be attributed to the small critical volume size for nucleation and the large activation energy for ferroelectric dipole flipping. This results demonstrates the potential of ferroelectric HfO2 for analog device applications enabling neuromorphic computing. Second, the ferroelectric behavior of Y-doped HfO2 (YHO) thin film epitaxially stabilized on an Si substrate with a yttria-stabilized zirconia (YSZ) buffer layer was investigated for the transistor based memory applications. Structural analysis exhibited epitaxial relation between YHO and Si substrate even the existence of thermally regrown SiOx layer. Piezoresponse force microscopy results show the ferroelectric domain pattern, implying the existence of ferroelectricity in the epitaxial HfO2 film. The epitaxially-stabilized HfO2 film in the form of a metal-ferroelectric-insulator-semiconductor structure exhibits ferroelectric hysteresis with a clear ferroelectric switching current in polarization-voltage measurements. The HfO2 thin film also demonstrates ferroelectric retention comparable to that of current perovskite-based metal-ferroelectric-insulator-semiconductor structures. At last, colossal resistance change in the ferroelectric HfO2 based tunnel junction was investigated. Ferroelectric HfO2 ultrathin film (~ 1 nm) integrated directly on a silicon wafer exhibited On/Off tunneling electroresistance ratio of 106. To achieve this large On/Off ratio, we integrated the epitaxial fluorite-structure HfO2 thin film on the silicon substrate. The polarization direction in the metal-ferroelectric-semiconductor junction altered the depletion width, leaving behind the change in the tunnel barrier. Industry-relevant HfO2 with high CMOS compatibility could lead to fast adoption of a ferroelectric tunnel barrier with newly observed ferroelectricity in fluorite-structured HfO2 films.์ตœ๊ทผ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์—์„œ ๋ฐœ๊ฒฌ๋œ ์ค‘์‹ฌ ๋Œ€์นญ์„ฑ์ด ๊นจ์ง„ ๋ฐ˜์ „ ๋Œ€์นญ ํŒŒ๊ดด์™€ ์ž๋ฐœ๋ถ„๊ทน์€ ๊ฐ•์œ ์ „์ฒด๋ฅผ ๊ธฐ๋ฐ˜์œผ๋กœ ํ•œ ๋ฉ”๋ชจ๋ฆฌ ๋ฐ ๋…ผ๋ฆฌ ์žฅ์น˜์˜ ํ™œ์šฉ ๊ฐ€๋Šฅ์„ฑ์— ๋Œ€ํ•œ ์ƒˆ๋กœ์šด ๊ธธ์„ ์ œ์‹œํ•˜์˜€๋‹ค. ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์€ ์‹œ๋ชจ์Šค ๊ธฐ์ˆ ๊ณผ์˜ ํ˜ธํ™˜์„ฑ๊ณผ ๋†’์€ ์ง‘์ ‘๋„๋กœ ์ธํ•ด์„œ ํŽ˜๋กœ๋ธŒ์Šค์นด์ดํŠธ ๊ธฐ๋ฐ˜ ๊ฐ•์œ ์ „์ฒด์˜ ๋Œ€์•ˆ์œผ๋กœ ์—ฌ๊ฒจ์ง€๊ณ  ์žˆ๋‹ค. ์‚ฌ๋ฐฉ์ •๊ณ„ Pca21 ๊ตฌ์กฐ ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์—์„œ 10-40 ฮผC/cm2 ์˜ ํฐ ์ž๋ฐœ๋ถ„๊ทน ๊ฐ’์ด ๋ณด๊ณ ๋˜์—ˆ๋‹ค. ๊ฐ•์œ ์ „ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ๊ตฌ์กฐ ๋ณ€ํ™”๋ฅผ ์ˆ˜๋ฐ˜ํ•œ ๋‹ค์–‘ํ•œ ์ „๊ธฐ์  ํŠน์„ฑ์ด ๋„ํ•‘์ด๋‚˜ ์ „๊ธฐ์žฅ์˜ ๋ฐ˜๋ณต์„ ํ†ตํ•˜์—ฌ ํ™•๋ณด๋  ์ˆ˜ ์žˆ๋‹ค. ์ด๋Ÿฌํ•œ ํŠน์„ฑ์œผ๋กœ ์ธํ•ด ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ์‹œ๋ชจ์Šค ๊ณต์ • ์ ์šฉ ์—ฐ๊ตฌ๋Š” ์ฐจ์„ธ๋Œ€ ๋น„ํœ˜๋ฐœ์„ฑ ๋ฉ”๋ชจ๋ฆฌ ๋ฐ ๋…ผ๋ฆฌ ์†Œ์ž์˜ ๋ฐœ์ „์— ๋„์›€์ด ๋  ๊ฒƒ์ด๋‹ค. ์ด ํ•™์œ„ ๋…ผ๋ฌธ์—์„œ๋Š” ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ๋…ํŠนํ•œ ํŠน์„ฑ๊ณผ ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ์‹ค๋ฆฌ์ฝ˜๊ณผ์˜ ๊ฒฐ๋งž์Œ ์„ฑ์žฅ์— ๊ด€ํ•˜์—ฌ ๋…ผํ•œ๋‹ค. ์ฒซ๋ฒˆ์งธ๋กœ, ์‹ค๋ฆฌ์ฝ˜ ๋„ํ•‘๋œ ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ์ „๋ก€ ์—†๋Š” ์•ˆ์ •์ ์ธ ํ•˜์œ„ ๋ฃจํ”„ ์Šค์œ„์นญ ๋™์ž‘๊ณผ ์ค‘๊ฐ„ ๋ถ„๊ทน ์ƒํƒœ์˜ ์ ‘๊ทผ์— ๊ด€ํ•˜์—ฌ ์กฐ์‚ฌํ•˜์˜€๋‹ค. ์ผ๋ฐ˜์ ์ธ ์ „์•• ์ธ๊ฐ€ ์‹คํ—˜, ์ด๋ ฅ๊ณก์„ ์˜ ์˜จ๋„ ์˜์กด์„ฑ, ์••์ „ํž˜ ํ˜„๋ฏธ๊ฒฝ, ์ œ 1 ์›๋ฆฌ ๊ณ„์‚ฐ, ๋ชฌํ…Œ ์นด๋ฅผ๋กœ ์‹œ๋ฎฌ๋ ˆ์ด์…˜์„ ํ†ตํ•˜์—ฌ ์ „๋ก€ ์—†๋Š” ๊ฐ•์œ ์ „ ์ค‘๊ฐ„ ๋ถ„๊ทน ์ƒํƒœ์˜ ์•ˆ์ •์„ฑ์ด ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ์ž‘์€ ํ•ต ์ž„๊ณ„ ๋ถ€ํ”ผ์™€ ๋ถ„๊ทน์„ ๋’ค์ง‘๊ธฐ ์œ„ํ•œ ๋†’์€ ํ™œ์„ฑํ™” ์—๋„ˆ์ง€์— ๊ธฐ์ธํ•˜๋Š” ๊ฒƒ์„ ํ™•์ธํ•˜์˜€๋‹ค. ํ•ด๋‹น ๊ฒฐ๊ณผ๋Š” ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ์•„๋‚ ๋กœ๊ทธ ์†Œ์ž๋กœ์˜ ๊ฐ€๋Šฅ์„ฑ์„ ์ œ์‹œํ•˜๋ฉฐ ์‹ ๊ฒฝ ๋ชจ์‚ฌ ์ปดํ“จํŒ…์˜ ๊ฐ€๋Šฅ์„ฑ์„ ์—ด์—ˆ๋‹ค. ๋‘๋ฒˆ์งธ๋กœ, ํŠธ๋žœ์ง€์Šคํ„ฐ ๊ธฐ๋ฐ˜ ๋ฉ”๋ชจ๋ฆฌ ํ™œ์šฉ์„ ์œ„ํ•˜์—ฌ ์ดํŠธ๋ฅจ ์•ˆ์ •ํ™” ์ง€๋ฅด์ฝ”๋Š„ ์ค‘๊ฐ„ ์ธต์„ ์ด์šฉํ•˜์—ฌ ์‹ค๋ฆฌ์ฝ˜ ์œ„์— ๊ฒฐ๋งž์Œ ์„ฑ์žฅํ•œ ์ดํŠธ๋ฅจ ๋„ํ•‘๋œ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ๊ฐ•์œ ์ „ ํŠน์„ฑ์— ๊ด€ํ•˜์—ฌ ๋ถ„์„ํ•˜์˜€๋‹ค. ๊ตฌ์กฐ๋ถ„์„์—์„œ ๊ณ ์˜จ ์ฆ์ฐฉ ๊ณผ์ •์—์„œ ํ˜•์„ฑ๋œ ์‹ค๋ฆฌ์ฝ˜ ์‚ฐํ™”๋ง‰์—๋„ ๋ถˆ๊ตฌํ•˜๊ณ  ์ดํŠธ๋ฅจ ๋„ํ•‘๋œ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์ด ์‹ค๋ฆฌ์ฝ˜๊ณผ ๊ฒฐ๋งž์Œ ๊ด€๊ณ„์— ์žˆ๋Š” ๊ฒƒ์„ ํ™•์ธํ•˜์˜€๋‹ค. ์••์ „ํž˜ ํ˜„๋ฏธ๊ฒฝ์„ ํ†ตํ•˜์—ฌ ๊ฐ•์œ ์ „์ฒด ๋„๋ฉ”์ธ ์˜์—ญ์„ ํ™•์ธํ•˜์—ฌ ๊ฐ•์œ ์ „ ํŠน์„ฑ์ด ์žˆ์Œ์„ ํ™•์ธํ•˜์˜€๋‹ค. ๊ฒฐ๋งž์Œ ์„ฑ์žฅํ•œ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์€ ๊ธˆ์†-๊ฐ•์œ ์ „์ฒด-์œ ์ „์ฒด-๋ฐ˜๋„์ฒด ๊ตฌ์กฐ์—์„œ ๋ถ„๋ช…ํ•œ ์Šค์œ„์นญ ์ „๋ฅ˜๋ฅผ ๋ถ„๊ทน-์ „์•• ์‹คํ—˜์—์„œ ๋ณด์˜€๋‹ค. ๋˜ํ•œ, ๊ธฐ์กด ํŽ˜๋กœ๋ธŒ์Šค์นด์ดํŠธ ๊ธฐ๋ฐ˜์˜ ๊ฐ•์œ ์ „์ฒด ์†Œ์ž ๊ตฌ์กฐ์—์„œ ํ™•๋ณด๋˜๋Š” ์ •๋„์˜ ๋ถ„๊ทน ์œ ์ง€๋ ฅ์„ ํ™•์ธํ•˜์˜€๋‹ค. ๋งˆ์ง€๋ง‰์œผ๋กœ, ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ ๊ธฐ๋ฐ˜ ํ„ฐ๋„ ์ ‘ํ•ฉ์— ๋‚˜ํƒ€๋‚œ ํฐ ์ €ํ•ญ ๋ณ€ํ™”์— ๋Œ€ํ•ด ์กฐ์‚ฌํ•˜์˜€๋‹ค. ์•ฝ 1 ๋‚˜๋…ธ๋ฏธํ„ฐ ๋‘๊ป˜์˜ ์–‡์€ ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์„ ์‹ค๋ฆฌ์ฝ˜ ์œ„์— ์ง์ ‘ ์ ‘ํ•ฉํ•˜์—ฌ 106 ์ •๋„์˜ ํ„ฐ๋„๋ง ์ผœ์ง/๊บผ์ง ์ €ํ•ญ ์ƒํƒœ ๋ณ€ํ™”๋น„๋ฅผ ํ™•๋ณดํ•˜์˜€๋‹ค. ํฐ ์ €ํ•ญ ๋ณ€ํ™”๋น„๋ฅผ ํ™•๋ณดํ•˜๊ธฐ ์œ„ํ•ด ๋‹จ๊ฒฐ์ •ํ˜• ํ˜•์„ ๊ตฌ์กฐ ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์„ ์‹ค๋ฆฌ์ฝ˜์œ„์— ๊ฒฐ๋งž์Œ ์„ฑ์žฅํ•˜์˜€๋‹ค. ๊ธˆ์†-๊ฐ•์œ ์ „์ฒด-๋ฐ˜๋„์ฒด ์ ‘ํ•ฉ์—์„œ ๊ฐ•์œ ์ „ ๋ถ„๊ทน ๋ฐฉํ–ฅ์€ ๊ฒฐํ•์ธต์˜ ํญ ๋ณ€ํ™”๋ฅผ ๋งŒ๋“ค์–ด ๋ƒˆ์œผ๋ฉฐ, ๊ฒฐํ•์ธต์˜ ๋ณ€ํ™”๋Š” ํ„ฐ๋„๋ง ์žฅ๋ฒฝ์˜ ๋ณ€ํ™”๋ฅผ ๋งŒ๋“ค์–ด๋ƒˆ๋‹ค. ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ์˜ ๋†’์€ ์‹œ๋ชจ์Šค ๊ณต์ • ํ˜ธํ™˜์„ฑ์œผ๋กœ ์ธํ•ด ํ•ด๋‹น ์—ฐ๊ตฌ์—์„œ ๋ฐœ๊ฒฌ๋œ ๊ฐ•์œ ์ „์ฒด ํ•˜ํ”„๋Š„ ์‚ฐํ™”๋ฌผ ๊ธฐ๋ฐ˜ ํ„ฐ๋„๋ง ์†Œ์ž์—์„œ ๊ด€์ธก๋œ ํฐ ์ €ํ•ญ ๋ณ€ํ™”๋Š” ๋น ๋ฅด๊ฒŒ ์‚ฐ์—… ๋ถ„์•ผ์— ์ ์šฉ๋  ๊ฒƒ์œผ๋กœ ์˜ˆ์ƒ๋œ๋‹ค.List of Figures 1 Abstract 7 Chapter 1. Introduction 9 1.1 Ferroelectricity 9 1.2 Ferroelectric Hafnium Oxide 10 1.3 References 12 Chapter 2. Experimental Methods 13 2.1 Pulsed laser deposition 13 2.2 Structure Analysis 14 2.3 Piezoresponse Force Microscopy 15 2.4 References 17 Chapter 3. Stability of Subloop Behavior for Analog Devices in Ferroelectric HfO2 18 3.1 Introduction 18 3.2 Sample Fabrication 20 3.3 Stable Subloop Behavior of Ferroelectric Polarization 22 3.4 Parameters for Ferroelectric Switching of HfO2 28 3.5 Slow Domain Wall Motion of HfO2 31 3.6 Theoretical Calculations and Simulations 34 3.7 Conclusion 40 3.8 References 42 Chapter 4. Growth of Epitaxial Ferroelectric Y-doped HfO2 on Si for 1T-FeRAM Applications 52 4.1 Introduction 52 4.2 Sample Fabrication 53 4.3 Structural Analysis 53 4.4 Microscopic Ferroelectricity Analysis 56 4.5 Macroscopic Ferroelectricity Analysis 58 4.6 Conclusion 62 4.7 References 63 Chapter 5. Growth of Ultrathin Epitaxial Ferroelectric HfO2 on Si for Tunneling Device 67 5.1 Introduction 67 5.2 Sample Fabrication 69 5.3 Structural Analysis 69 5.4 Microscopic Ferroelectricity Analysis 73 5.5 Ferroelectric Polarization Modulated Resistance States 74 5.6 Theoretical Calculations and Simulations 78 5.7 Conclusion 82 5.8 References 84 Chapter 6. Conclusion 90 Curriculum Vitage and List of Publication 92 Abstract in Korean 97 Appendix 99 ๊ฐ์‚ฌ์˜ ๊ธ€ 118๋ฐ•

    Defects in ferroelectric HfO2

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    Hafnium-doped tantalum oxide high-k gate dielectric films for future CMOS technology

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    A novel high-k gate dielectric material, i.e., hafnium-doped tantalum oxide (Hf-doped TaOx), has been studied for the application of the future generation metal-oxidesemiconductor field effect transistor (MOSFET). The film's electrical, chemical, and structural properties were investigated experimentally. The incorporation of Hf into TaOx impacted the electrical properties. The doping process improved the effective dielectric constant, reduced the fixed charge density, and increased the dielectric strength. The leakage current density also decreased with the Hf doping concentration. MOS capacitors with sub-2.0 nm equivalent oxide thickness (EOT) have been achieved with the lightly Hf-doped TaOx. The low leakage currents and high dielectric constants of the doped films were explained by their compositions and bond structures. The Hf-doped TaOx film is a potential high-k gate dielectric for future MOS transistors. A 5 รƒร‚ tantalum nitride (TaNx) interface layer has been inserted between the Hf-doped TaOx films and the Si substrate to engineer the high-k/Si interface layer formation and properties. The electrical characterization result shows that the insertion of a 5 รƒร‚ TaNx between the doped TaOx films and the Si substrate decreased the film's leakage current density and improved the effective dielectric constant (keffective) value. The improvement of these dielectric properties can be attributed to the formation of the TaOxNy interfacial layer after high temperature O2 annealing. The main drawback of the TaNx interface layer is the high interface density of states and hysteresis, which needs to be decreased. Advanced metal nitride gate electrodes, e.g., tantalum nitride, molybdenum nitride, and tungsten nitride, were investigated as the gate electrodes for atomic layer deposition (ALD) HfO2 high-k dielectric material. Their physical and electrical properties were affected by the post metallization annealing (PMA) treatment conditions. Work functions of these three gate electrodes are suitable for NMOS applications after 800รƒร‚ยฐC PMA. Metal nitrides can be used as the gate electrode materials for the HfO2 high-k film. The novel high-k gate stack structures studied in this study are promising candidates to replace the traditional poly-Si-SiO2 gate stack structure for the future CMOS technology node

    Electrical characterization of high-k gate dielectrics for advanced CMOS gate stacks

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    The oxide/substrate interface quality and the dielectric quality of metal oxide semiconductor (MOS) gate stack structures are critical to future CMOS technology. As SiO2 was replaced by the high-k dielectric to further equivalent oxide thickness (EOT), high mobility substrates like Ge have attracted increasing in replacing Si substrate to further enhance devices performance. Precise control of the interface between high-k and the semiconductor substrate is the key of the high performance of future transistor. In this study, traditional electrical characterization methods are used on these novel MOS devices, prepared by advanced atomic layer deposition (ALD) process and with pre and post treatment by plasma generated by slot plane antenna (SPA). MOS capacitors with a TiN metal gate/3 nm HfAlO/0.5 nm SiO2/Si stacks were fabricated by different Al concentration, and different post deposition treatments. A simple approach is incorporated to correct the error, introduced by the series resistance (Rs) associated with the substrate and metal contact. The interface state density (Dit), calculated by conductance method, suggests that Dit is dependent on the crystalline structure of hafnium aluminum oxide film. The amorphous structure has the lowest Dit whereas crystallized HfO2 has the highest Dit. Subsequently, the dry and wet processed interface layers for three different p type Ge/ALD 1nm-Al2O3/ALD 3.5nm-ZrO2/ALD TiN gate stacks are studied at low temperatures by capacitance-voltage (CV),conductance-voltage (GV) measurement and deep level transient spectroscopy (DLTS). Prior to high-k deposition, the interface is treated by three different approaches (i) simple chemical oxidation (Chemox); (ii) chemical oxide removal (COR) followed by 1 nm oxide by slot-plane-antenna (SPA) plasma (COR&SPAOx); and (iii) COR followed by vapor O3 treatment (COR&O3). Room temperature measurement indicates that superior results are observed for slot-plane-plasma-oxidation processed samples. The reliability of TiN/ZrO2/Al2O3/p-Ge gate stacks is studied by time dependent dielectric breakdown (TDDB). High-k dielectric is subjected to the different slot plane antenna oxidation (SPAO) processes, namely, (i) before high-k ALD (Atomic Layer Deposition), (ii) between high-k ALD, and (iii) after high-k ALD. High-k layer and interface states are improved due to the formation of GeO2 by SPAO when SPAO is processed after high-k. GeO2 at the interface can be degraded easily by substrate electron injection. When SPAO is processed between high-k layers, a better immunity of interface to degradation was observed under stress. To further evaluate the high-k dielectrics and how EOT impacts on noise mechanism time zero 1/f noise is characterized on thick and thin oxide FinFET transistors, respectively. The extracted noise models suggest that as a function of temperatures and bias conditions the flicker noise mechanism tends to be carrier number fluctuation model (McWhorter model). Furthermore, the noise mechanism tends to be mobility fluctuation model (Hooge model) when EOT reduces

    Investigation of high-K gate dielectrics for advanced CMOS application

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    Ph.DDOCTOR OF PHILOSOPH
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