Design and performance analysis of front and back Pi 6 nm gate with high K dielectric passivated high electron mobility transistor

Advanced high electron mobility transistor (HEMT) with dual front gate, back gate with silicon nitride/aluminum oxide (Si3N4/Al2O3) as passivation layer, has been designed. The dependency on DC characteristics and radio frequency characteristics due to GaN cap layers, multi gate (FG and BG), and high K dielectric material is established. Further compared single gate (SG) passivated HEMT, double gate (DG) passivated HEMT, double gate triple (DGT) tooth passivated HEMT, high K dielectric front Pi gate (FG) and back Pi gate (BG) HEMT. It is observed that there is an increased drain current (Ion) of 5.92 (A/mm), low leakage current (Ioff) 5.54E-13 (A) of transconductance (Gm) of 3.71 (S/mm), drain conductance (Gd) of 1.769 (S/mm), Cutoff frequency (fT) of 743 GHz maximum oscillation frequency (Fmax) 765 GHz, minimum threshold voltage ( ) of -4.5 V, on resistance (Ron) of 0.40 (Ohms) at V. These outstanding characteristics and transistor structure of proposed HEMT and materials involved to apply for upcoming generation high-speed GHz frequency applications

Particle-Based Modeling of Reliability for Millimeter-Wave GaN Devices for Power Amplifier Applications

abstract: In this work, an advanced simulation study of reliability in millimeter-wave (mm-wave) GaN Devices for power amplifier (PA) applications is performed by means of a particle-based full band Cellular Monte Carlo device simulator (CMC). The goal of the study is to obtain a systematic characterization of the performance of GaN devices operating in DC, small signal AC and large-signal radio-frequency (RF) conditions emphasizing on the microscopic properties that correlate to degradation of device performance such as generation of hot carriers, presence of material defects and self-heating effects. First, a review of concepts concerning GaN technology, devices, reliability mechanisms and PA design is presented in chapter 2. Then, in chapter 3 a study of non-idealities of AlGaN/GaN heterojunction diodes is performed, demonstrating that mole fraction variations and the presence of unintentional Schottky contacts are the main limiting factor for high current drive of the devices under study. Chapter 4 consists in a study of hot electron generation in GaN HEMTs, in terms of the accurate simulation of the electron energy distribution function (EDF) obtained under DC and RF operation, taking into account frequency and temperature variations. The calculated EDFs suggest that Class AB PAs operating at low frequency (10 GHz) are more robust to hot carrier effects than when operating under DC or high frequency RF (up to 40 GHz). Also, operation under Class A yields higher EDFs than Class AB indicating lower reliability. This study is followed in chapter 5 by the proposal of a novel π-Shaped gate contact for GaN HEMTs which effectively reduces the hot electron generation while preserving device performance. Finally, in chapter 6 the electro-thermal characterization of GaN-on-Si HEMTs is performed by means of an expanded CMC framework, where charge and heat transport are self-consistently coupled. After the electro-thermal model is validated to experimental data, the assessment of self-heating under lateral scaling is considered.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201

Design, Modeling and Analysis of Non-classical Field Effect Transistors

Transistor scaling following per Moore\u27s Law slows down its pace when entering into nanometer regime where short channel effects (SCEs), including threshold voltage fluctuation, increased leakage current and mobility degradation, become pronounced in the traditional planar silicon MOSFET. In addition, as the demand of diversified functionalities rises, conventional silicon technologies cannot satisfy all non-digital applications requirements because of restrictions that stem from the fundamental material properties. Therefore, novel device materials and structures are desirable to fuel further evolution of semiconductor technologies. In this dissertation, I have proposed innovative device structures and addressed design considerations of those non-classical field effect transistors for digital, analog/RF and power applications with projected benefits. Considering device process difficulties and the dramatic fabrication cost, application-oriented device design and optimization are performed through device physics analysis and TCAD modeling methodology to develop design guidelines utilizing transistor\u27s improved characteristics toward application-specific circuit performance enhancement. Results support proposed device design methodologies that will allow development of novel transistors capable of overcoming limitation of planar nanoscale MOSFETs. In this work, both silicon and III-V compound devices are designed, optimized and characterized for digital and non-digital applications through calibrated 2-D and 3-D TCAD simulation. For digital functionalities, silicon and InGaAs MOSFETs have been investigated. Optimized 3-D silicon-on-insulator (SOI) and body-on-insulator (BOI) FinFETs are simulated to demonstrate their impact on the performance of volatile memory SRAM module with consideration of self-heating effects. Comprehensive simulation results suggest that the current drivability degradation due to increased device temperature is modest for both devices and corresponding digital circuits. However, SOI FinFET is recommended for the design of low voltage operation digital modules because of its faster AC response and better SCEs management than the BOI structure. The FinFET concept is also applied to the non-volatile memory cell at 22 nm technology node for low voltage operation with suppressed SCEs. In addition to the silicon technology, our TCAD estimation based on upper projections show that the InGaAs FinFET, with superior mobility and improved interface conditions, achieve tremendous drive current boost and aggressively suppressed SCEs and thereby a strong contender for low-power high-performance applications over the silicon counterpart. For non-digital functionalities, multi-fin FETs and GaN HEMT have been studied. Mixed-mode simulations along with developed optimization guidelines establish the realistic application potential of underlap design of silicon multi-Fin FETs for analog/RF operation. The device with underlap design shows compromised current drivability but improve analog intrinsic gain and high frequency performance. To investigate the potential of the novel N-polar GaN material, for the first time, I have provided calibrated TCAD modeling of E-mode N-polar GaN single-channel HEMT. In this work, I have also proposed a novel E-mode dual-channel hybrid MIS-HEMT showing greatly enhanced current carrying capability. The impact of GaN layer scaling has been investigated through extensive TCAD simulations and demonstrated techniques for device optimization

Characterization of the Dynamic RON of 600 V GaN Switches under Operating Conditions

High-voltage GaN switches can offer tremendous advantages over silicon counterparts for the development of high-efficiency switching-mode power converters at high commutation frequency. Nonetheless, GaN devices are prone to charge-trapping effects that can be particularly relevant in the early-stage development of new technologies. Charge-trapping mechanisms are responsible for the degradation of the dynamic ON-resistance (RON) with respect to its static value: this degradation is typically dependent on the blocking voltage, the commutation frequency and temperature, and is responsible for the reduction of power converter efficiency. The characterization of this phenomenon is very valuable for the development of a new process to compare different technological solutions or for the final assessment of performance. This characterization cannot be made with traditional static or small signal measurements since RON degradation is triggered by application-like dynamic device excitations. In this paper, we propose a technique for the characterization of the dynamic RON of high-voltage GaN switches under real operating conditions: this technique is based on the design of a half bridge switching leg in which the DUT is operated under conditions that resemble its operation in a power converter. With this setup, the characterization of a 600 V GaN switch dynamic RON is performed as a function of variable blocking voltages and commutation frequency. Additionally, this technique allows the separation of thermal and trapping effects, enabling the characterization of the dynamic RON at different temperature

Device physics and failure mechanisms of deep submicron gate GaN HEMTs for microwave and millimeter-wave applications

openThis thesis presents the findings of a comprehensive characterization study on GaN-based, gate-scaled HEMTs (with Lg < 0.15 µm) for RF applications. The investigation considers performance, stability, and reliability aspects. Specifically, static and dynamic measurements were conducted for the devices under test to assess the influence of short-channel effects and deep-level traps on their characteristics. This involved double-pulse measurements both in OFF and semi-ON state stress and transient measurements. The observed results are compared with those reported in the literature to determine the nature and location of traps responsible for performance variations. In the end stress test were performed to investigate the reliability of the devices. This research contributes to a deeper understanding of the underlying mechanisms and provides valuable insights for the optimization of future GaN-based device designs.This thesis presents the findings of a comprehensive characterization study on GaN-based, gate-scaled HEMTs (with Lg < 0.15 µm) for RF applications. The investigation considers performance, stability, and reliability aspects. Specifically, static and dynamic measurements were conducted for the devices under test to assess the influence of short-channel effects and deep-level traps on their characteristics. This involved double-pulse measurements both in OFF and semi-ON state stress and transient measurements. The observed results are compared with those reported in the literature to determine the nature and location of traps responsible for performance variations. In the end stress test were performed to investigate the reliability of the devices. This research contributes to a deeper understanding of the underlying mechanisms and provides valuable insights for the optimization of future GaN-based device designs

Investigation of Gallium Nitride Heterostructures for Application to High Electron Mobility Transistors

abstract: With the high demand for faster and smaller wireless communication devices, manufacturers have been pushed to explore new materials for smaller and faster transistors. One promising class of transistors is high electron mobility transistors (HEMT). AlGaAs/GaAs HEMTs have been shown to perform well at high power and high frequencies. However, AlGaN/GaN HEMTs have been gaining more attention recently due to their comparatively higher power densities and better high frequency performance. Nevertheless, these devices have experienced truncated lifetimes. It is assumed that reducing defect densities in these materials will enable a more direct study of the failure mechanisms in these devices. In this work we present studies done to reduce interfacial oxygen at N-polar GaN/GaN interfaces, growth conditions for InAlN barrier layer, and microanalysis of a partial InAlN-based HEMT. Additionally, the depth of oxidation of an InAlN layer on a gate-less InAlN/GaN metal oxide semiconductor HEMT (MOSHEMT) was investigated. Measurements of electric fields in AlGaN/GaN HEMTs with and without field plates are also presented.Dissertation/ThesisDoctoral Dissertation Physics 201

An Analysis of the Effects of Low Energy Electron Radiation of Al\u3csub\u3ex\u3c/sub\u3eGa\u3csub\u3e1-x\u3c/sub\u3eN/GaN Modulation-Doped Field-Effect Transistors

The effects of radiation on AlxGa1-xN/GaN MODFETs is an area of increasing interest to the USAF as these devices become developed and integrated in satellite-based systems Irradiation is also a valuable tool for analyzing the quantum-level characteristics and properties that are responsible for device operation AlxGa1-xN/GaN MODFETs were fabricated and irradiated at liquid nitrogen temperatures by 0,45-1,2MeV electrons up to doses of 6*1016 e/cm2. Following irradiation, low temperature I-V measurements were recorded providing dose-dependent measurements Temperature-dependent I-V measurements were also made during room temperature annealing following irradiation I-V measurements indicate radiation-induced changes occur in these devices creating increased gate and drain currents These increased currents are only maintained at low temperatures (T \u3c 300 K), It is believed that the increase in gate current is caused by an increase in the electron trap concentration of the AlxGa1-xN/GaN layer, This increase in trap concentration directly increases the trap-assisted tunneling current resulting in the observed increase in gate current The mechanism causing the increase in drain current is unknown, Several theories explaining this increase are presented along with the additional research necessary to illuminate the correct theory, This is the first experiment involving electron radiation of AlxGa1-xN/GaN MODFETs

Targeted Germanium Ion Irradiation of Aluminum Gallium Nitride/Gallium Nitride High Electron Mobility Transistors

Microscale beams of germanium ions were used to target different locations of aluminum galliumnitride/gallium nitride (AlGaN/GaN) high electron mobility transistors (HEMTs) to determine location dependent radiation effects. 1.7 MeV Ge ions were targeted at the gap between the gate and the drain to observe displacement damage effects while 47 MeV Ge ions were targeted at the gate to observe ionization damage effects. Electrical data was taken pre, during, and post irradiation. To separate transient from permanent degradation, the devices were characterized after a room temperature anneal for at least 30 days. Optical images were also analyzed pre and post irradiation. This is the first use of localized dynamic irradiation testing has been used to compare AlGaN/GaN HEMT performance to the results of stress testing via in situ measurements of the gate and drain currents. The 6 MV Tandem Accelerator at Sandia National Laboratories using the Micro-ONE system was used to induce displacement and ionization damage. Displacement damage was caused by 1.7 MeV Ge ions targeting the gate-drain gap of ten HEMTs in the off, on, and semi-on bias states where a fluence dependent delayed response between ion deposition and gate current degradation in the semi-on and on bias state was observed. The delayed response was also observed in the drain current degradation when biased in the semi-on state, while occurring immediately in the on state. Ionization damage was induced by 47 MeV Ge ions targeting the gate region in the semi-on bias state where gate current degradation occurred during the initial irradiation of the gate active region. Drain current degradation occurred in both the initial and subsequent irradiations. Pre and post irradiation output and transfer performance characteristics indicate drain current and transconductance degradation for both experiments in all bias states. No threshold voltage shift was observed during the displacement damage experiment with 1.7 MeV Ge ions. During the ionization experiment, the threshold voltage increased after the initial irradiation with 2 x 1010 cm-2 47 MeV Ge ions across the length of the gate. Subsequent irradiation over the same location and after a 60 day room temperature anneal did not change this threshold voltage shift and the decrease in the drain current and transconductance persisted, indicating permanent damage. The same performance characteristics changes have been associated with reliability stress testing causing similar effective damage in both the gate-drain gap and the gate regions. The observed degradation in device characteristics are consistent with the inverse piezoelectric effect in the displacement damage experiment and charge trapping in the gate region in the ionization experiment. These results show that radiation induced degradation can be captured by using a targeted ion beam in order to determine location dependent fluence limits, thereby informing both reliability and radiation hardness models

Conception et fabrication de FinFET GaN verticaux de puissance normalement bloqués

Abstract: The tremendous demands for high-performance systems driven by economic constraints forced the semiconductor industry to considerably scale the device's dimensions to compensate for the relatively modest Silicon physical properties. Those limitations pave the way for III-V semiconductors, which are excellent alternatives to Silicon and can be declined in many compositions. For example, Gallium Nitride (GaN) has been considered a fabulous competitor to facilitate the semiconductor industry's horizon beyond the performance limitations of Silicon due to its high mobility, wide bandgap, and high thermal conductivity properties for T>300K (Bulk GaN). It promises to trim the losses in power conversion circuits and drive a 10 % reduction in power consumption. Both lateral and vertical structures have been considered for GaN power devices. The AlGaN/GaN HEMT device's immense potential comes from the high density, high mobility electron gas formed at its heterojunction. The device is vulnerable to reliability issues resulting from the frequent exposure to high electric field collapse, temperature, and stress conditions, thus limiting its performance and reliability. Contrariwise, the vertical GaN power devices have attracted much attention because of the potential to reach high voltage and current levels without enlarging the chip's size. Furthermore, such vertical devices show superior thermal performance to their lateral counterparts. Meanwhile, Vertical GaN devices have the challenges of high leakage current and the breakdown occurring at the corners of the channel. Another challenge associated with Normally off devices is the lack of an optimized method for eliminating the magnesium diffusion from the p-GaN layer. This thesis has two strategic objectives; Firstly, a Normally-OFF GaN Power FinFET has been designed and optimized to overcome the vertical GaN FinFET challenges. It was done by optimizing the performance parameters such as threshold voltage VTH, high breakdown VBR, and the specific ON-state-resistance RON. Accordingly, the impact of both structural and physical parameters should be incorporated to have an exact optimization process. Afterward, the identification and optimization of a low-cost and high-quality fabrication process for the proposed structure underlined this thesis as the second objective.Les énormes demandes de systèmes à hautes performances motivées par des contraintes économiques ont forcé l'industrie des semi-conducteurs à réduire considérablement les dimensions des dispositifs pour compenser les propriétés physiques relativement modestes du silicium. Ces limitations ouvrent la voie aux semi-conducteurs III-V, qui sont d'excellentes alternatives au silicium et peuvent être déclinés dans de nombreuses compositions. Par exemple, le nitrure de gallium (GaN) a été considéré comme un concurrent fabuleux pour faciliter l'horizon de l'industrie des semi-conducteurs au-delà des limitations de performances du silicium en raison de sa grande mobilité, de sa large bande interdite et de ses propriétés de conductivité thermique élevées pour T>300K (Bulk GaN). Il promet de réduire les pertes dans les circuits de conversion de puissance et de réduire de 10 % la consommation d'énergie. À l'heure actuelle, les structures latérales et verticales ont été considérées pour les dispositifs de puissance en GaN. L'immense potentiel du dispositif HEMT AlGaN/GaN provient du gaz d'électrons à haute densité et à haute mobilité formé au niveau de son hétérojonction. Le dispositif est vulnérable aux problèmes de fiabilité résultant de l'exposition fréquente à des conditions d'effondrement de champ électrique, de température et de contrainte élevés, limitant ainsi ses performances et sa fiabilité. En revanche, les dispositifs de puissance verticaux en GaN ont attiré beaucoup d'attention en raison de leur capacité à atteindre des niveaux de tension et de courant élevés sans augmenter la taille de la puce. De plus, ces dispositifs verticaux présentent des performances thermiques supérieures à leurs homologues latéraux. Par ailleurs, les dispositifs GaN verticaux sont confrontés aux défis d'un courant de fuite élevée et de claquage se produisant aux coins du canal. Un autre défi associé aux dispositifs normalement bloqués est l'absence d'une méthode optimisée pour éliminer la diffusion de magnésium de la couche p-GaN. Cette thèse a deux objectifs stratégiques ; premièrement, un dispositif de puissance FinFET GaN normalement bloqué a été conçu et optimisé pour surmonter les défis du FinFET vertical en GaN. Cela a été fait en optimisant les paramètres de performance tels que la tension de seuil VTH, la tension de claquage VBR et la résistance spécifique à l'état passant RON. En conséquence, l'impact des paramètres structurels et physiques doit être incorporé pour avoir un processus d'optimisation précis. Par la suite, l'identification et l'optimisation d'un processus de fabrication à faible coût et de haute qualité pour la structure proposée à souligner cette thèse comme deuxième objectif

Distributed Modeling Approach for Electrical and Thermal Analysis of High-Frequency Transistors

The research conducted in this dissertation is focused on developing modeling approaches for analyzing high-frequency transistors and present solutions for optimizing the device output power and gain. First, a literature review of different transistor types utilized in high-frequency regions is conducted and gallium nitride high electron mobility transistor is identified as the promising device for these bands. Different structural configurations and operating modes of these transistors are explained, and their applications are discussed. Equivalent circuit models and physics-based models are also introduced and their limitations for analyzing the small-signal and large-signal behavior of these devices are explained. Next, a model is developed to investigate the thermal properties of different semiconductor substrates. Heat dissipation issues associated with some substrate materials, such as sapphire, silicon, and silicon carbide are identified, and thinning the substrates is proposed as a preliminary solution for addressing them. This leads to a comprehensive and universal approach to increase the heat dissipation capabilities of any substrate material and 2X-3X improvement is achieved according to this novel technique. Moreover, for analyzing the electrical behavior of these devices, a small-signal model is developed to examine the operation of transistors in the linear regions. This model is obtained based on an equivalent circuit which includes the distributed effects of the device at higher frequency bands. In other words, the wave propagation effects and phase velocity mismatches are considered when developing the model. The obtained results from the developed simulation tool are then compared with the measurements and excellent agreement is achieved between the two cases, which serves as the proof for validation. Additionally, this model is extended to predict and analyze the nonlinear behavior of these transistors and the developed tool is validated according to the obtained large-signal analysis results from measurement. Based on the developed modeling approach, a novel fabrication technique is also proposed which ensures the high-frequency operability of current devices with the available fabrication technologies, without forfeiting the gain and output power. The technical details regarding this approach and a sample configuration of the electrode model for the transistor based on the proposed design are also provided