High-level synthesis of switched-capacitor, switched-current and continuous-time ΣΔ modulators using SIMULINK-based time-domain behavioral models

This paper presents a high-level synthesis tool for ΣΔ Modulators (ΣΔMs) that combines an accurate SIMULINK-based time-domain behavioral simulator with a statistical optimization core. Three different circuit techniques for the modulator implementation are considered: switched-capacitor, switched-current and continuous-time. The behavioral models of these circuits, that take into account the most critical limiting factors, have been incorporated into the SIMULINK environment by using S-function blocks, which drastically increase the computational efficiency. The precision of these models has been validated by electrical simulations using HSPICE and experimental measurements from several silicon prototypes. The combination of high accuracy, short CPU time and interoperability of different circuit models together with the efficiency of the optimization engine makes the proposed tool an advantageous alternative for ΣΔM synthesis. The implementation on the well-known MATLAB/SIMULINK platform brings numerous advantages in terms of data manipulation, processing capabilities, flexibility and simulation with other electronic subsystems. Moreover, this is the first tool dealing with the synthesis of ΣΔMs using both discrete-time and continuous-time circuit techniques.This work was supported by the EU IST Project 2001-34283/TAMES-2 and by the Spanish Ministry of Science and Education (with support from the European Regional Development Fund) under Contract TIC2001-0929 ADAVERE and TEC2004-01752/MIC.Peer reviewe

Bandpass delta-sigma modulators for radio receivers

This thesis concerns discrete-time (DT) bandpass (BP) ΔΣ modulators targeted for intermediate frequency (IF) analog-to-digital (A/D) conversion in radio receivers. The receiver architecture adopted has to be capable of operating with different radio frequencies, channel bandwidths, and modulation techniques. This is necessary in order to achieve an extensive operating area and the possibility of utilizing a local mobile phone standard or a standard suitable for a specific service. The digital IF receiver is a good choice for a multi-mode and multi-band mobile phone receiver, because the signal demodulation and channel filtering are performed in the digital domain. This increases the flexibility of the receiver and relieves the design of the baseband part, but an A/D conversion with high dynamic range and low power dissipation is required. BP ΔΣ modulators are capable of converting a high-frequency narrow band signal and are therefore suitable for signal digitization in an IF receiver. First, the theory of BP ΔΣ modulators is introduced. It has been determined that resonators are the most critical circuit blocks in the implementation of a high performance BP ΔΣ modulator. Different DT resonator topologies are studied and a double-delay (DD) resonator is found to be the best candidate for a high quality resonator. A new DD switched-capacitor (SC) resonator structure has been designed. Furthermore, two evolution versions of the designed SC resonator are presented and their nonidealities are analyzed. The three designed DD SC resonator structures are a main point of the thesis, together with the experimental results. Five different DT BP ΔΣ modulator circuit structures have been implemented and measured. All three of the designed SC resonators are used in the implemented circuits. The experimental work consists of both single-bit and multi-bit structures, as well as both single-loop and cascade architectures. The circuits have been implemented with a 0.35 μm (Bi)CMOS technology and operate with a 3.0 V supply. The measured maximum signal-to-noise-and-distortion ratios (SNDRs) are 78 dB over 270 kHz (GSM), 75 dB over 1.25 MHz (IS-95), 69 dB over 1.762 MHz (DECT), and 48 dB over 3.84 MHz (WCDMA) bandwidths using a 60 MHz IF signal.reviewe

A survey on continuous-time modulators : theory, designs and implementations

Recently, delta-sigma modulation has become a widely applied technique for high-performance analog-to-digital conversion of narrow-band signals. Most of the early designs used discrete-time structure for good accuracy and good linearity. The transfer functions are independent of the clock frequency. However, high unity-gain bandwidths of the opamps are required to satisfy the settling accuracy required in the discrete-time designs. Continuous-time structure can potentially achieve higher clock frequency with less power consumption. the anti-aliasing filter can also be eliminated due to the anti-aliasing property of CT modulators. On the other hand, CT ADC have their own problems, such as jitter sensitivity and excess loop delay. In this thesis, the state-of-the-art of CT modulator is reviewed. The problems in the design of CT ADCs are analyzed and solutions to them are described. The theory, design and implementations of CT modulator will also be reviewed.Keywords: Continuous-Time, Delta-Sigm

Advances in Filter Miniaturization and Design/Analysis of RF MEMS Tunable Filters

The main purpose of this dissertation was to address key issues in the design and analysis of RF/microwave filters for wireless applications. Since RF/microwave filters are one of the bulkiest parts of communication systems, their miniaturization is one of the most important technological challenges for the development of compact transceivers. In this work, novel miniaturization techniques were investigated for single-band, dual-band, ultra-wideband and tunable bandpass filters. In single-band filters, the use of cross-shaped fractals in half-mode substrate-integrated-waveguide bandpass filters resulted in a 37 percent size reduction. A compact bandpass filter that occupies an area of 0.315 mm2 is implemented in 90-nm CMOS technology for 20 GHz applications. For dual-band filters, using half-mode substrate-integrated-waveguides resulted in a filter that is six times smaller than its full-mode counterpart. For ultra-wideband filters, using slow-wave capacitively-loaded coplanar-waveguides resulted in a filter with improved stopband performance and frequency notch, while being 25 percent smaller in size. A major part of this work also dealt with the concept of 'hybrid' RF MEMS tunable filters where packaged, off-the-shelf RF MEMS switches were used to implement high-performance tunable filters using substrate-integrated-waveguide technology. These 'hybrid' filters are very easily fabricated compared to current state-of-the-art RF MEMS tunable filters because they do not require a clean-room facility. Both the full-mode and half-mode substrate-integrated waveguide tunable filters reported in this work have the best Q-factors (93 - 132 and 75 - 140, respectively) compared to any 'hybrid' RF MEMS tunable filter reported in current literature. Also, the half-mode substrate-integrated waveguide tunable filter is 2.5 times smaller than its full-mode counterpart while having similar performance. This dissertation also presented detailed analytical and simulation-based studies of nonlinear noise phenomena induced by Brownian motion in all-pole RF MEMS tunable filters. Two independent mathematical methods are proposed to calculate phase noise in RF MEMS tunable filters: (1) pole-perturbation approach, and (2) admittance-approach. These methods are compared to each other and to harmonic balance noise simulations using the CAD-model of the RF MEMS switch. To account for the switch nonlinearity in the mathematical methods, a nonlinear nodal analysis technique for tunable filters is also presented. In summary, it is shown that output signal-to-noise ratio degradation due to Brownian motion is maximum for low fractional bandwidth, high order and high quality factor RF MEMS tunable filters. Finally, a self-sustained microwave platform to detect the dielectric constant of organic liquids is presented in this dissertation. The main idea is to use a voltage- controlled negative-resistance oscillator whose frequency of oscillation varies according to the organic liquid under test. To make the system self-sustained, the oscillator is embedded in a frequency synthesizer system, which is then digitally interfaced to a computer for calculation of dielectric constant. Such a system has potential uses in a variety of applications in medicine, agriculture and pharmaceuticals

Contribution to the design of continuous -time Sigma - Delta Modulators based on time delay elements

The research carried out in this thesis is focused in the development of a new class of data converters for digital radio. There are two main architectures for communication receivers which perform a digital demodulation. One of them is based on analog demodulation to the base band and digitization of the I/Q components. Another option is to digitize the band pass signal at the output of the IF stage using a bandpass Sigma-Delta modulator. Bandpass Sigma- Delta modulators can be implemented with discrete-time circuits, using switched capacitors or continuous-time circuits. The main innovation introduced in this work is the use of passive transmission lines in the loop filter of a bandpass continuous-time Sigma-Delta modulator instead of the conventional solution with gm-C or LC resonators. As long as transmission lines are used as replacement of a LC resonator in RF technology, it seems compelling that transmission lines could improve bandpass continuous-time Sigma-Delta modulators. The analysis of a Sigma- Delta modulator using distributed resonators has led to a completely new family of Sigma- Delta modulators which possess properties inherited both from continuous-time and discretetime Sigma-Delta modulators. In this thesis we present the basic theory and the practical design trade-offs of this new family of Sigma-Delta modulators. Three demonstration chips have been implemented to validate the theoretical developments. The first two are a proof of concept of the application of transmission lines to build lowpass and bandpass modulators. The third chip summarizes all the contributions of the thesis. It consists of a transmission line Sigma-Delta modulator which combines subsampling techniques, a mismatch insensitive circuitry and a quadrature architecture to implement the IF to digital stage of a receiver

A bandpass sigma delta modulator IF receiver

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 1997.Includes bibliographical references (leaves 170-173).by Emilija Simic.M.Eng

Wireless sensor platform for harsh environments

Reliable and efficient sensing becomes increasingly difficult in harsher environments. A sensing module for high-temperature conditions utilizes a digital, rather than analog, implementation on a wireless platform to achieve good quality data transmission. The module comprises a sensor, integrated circuit, and antenna. The integrated circuit includes an amplifier, A/D converter, decimation filter, and digital transmitter. To operate, an analog signal is received by the sensor, amplified by the amplifier, converted into a digital signal by the A/D converter, filtered by the decimation filter to address the quantization error, and output in digital format by the digital transmitter and antenna

High-performance delta-sigma analog-to-digital converters

Multi-stage delta-sigma (ΔΣ) architectures, commonly known as MASH, are the preferred choice for analog-to-digital converters (ADCs) used in broadband communication applications, where high-resolution (above 14 bits) and high-bandwidth (several MHz) performances are required. Current state-of-the-art designs are capable of as much as 5-MS/s output data rates with 90-dB SNR. However, inherent limitations in this type of converters have been addressed by the use of high-quality analog circuit components, making designs more complex, less robust, and higher performances difficult to achieve. This thesis describes the problems of extending bandwidth without losing accuracy in ΔΣ A/D converters, and presents three techniques which can overcome these problems: a low-distortion analog signal processing technique, the digital adaptive correction of analog circuit imperfections, and the fully digital estimation and correction of DAC errors. Combined, these techniques have the potential to achieve high-speed, high-resolution wideband ΔΣ conversion, even with low-performance analog components. The presented techniques were combined in a prototype chip, designed and fabricated in a 0.18 μm CMOS process. Simulation and preliminary measurement results show that they are highly effective

High performance continuous-time filters for information transfer systems

Vast attention has been paid to active continuous-time filters over the years. Thus as the cheap, readily available integrated circuit OpAmps replaced their discrete circuit versions, it became feasible to consider active-RC filter circuits using large numbers of OpAmps. Similarly the development of integrated operational transconductance amplifier (OTA) led to new filter configurations. This gave rise to OTA-C filters, using only active devices and capacitors, making it more suitable for integration. The demands on filter circuits have become ever more stringent as the world of electronics and communications has advanced. In addition, the continuing increase in the operating frequencies of modern circuits and systems increases the need for active filters that can perform at these higher frequencies; an area where the LC active filter emerges. What mainly limits the performance of an analog circuit are the non-idealities of the used building blocks and the circuit architecture. This research concentrates on the design issues of high frequency continuous-time integrated filters. Several novel circuit building blocks are introduced. A novel pseudo-differential fully balanced fully symmetric CMOS OTA architecture with inherent common-mode detection is proposed. Through judicious arrangement, the common-mode feedback circuit can be economically implemented. On the level of system architectures, a novel filter low-voltage 4th order RF bandpass filter structure based on emulation of two magnetically coupled resonators is presented. A unique feature of the proposed architecture is using electric coupling to emulate the effect of the coupled-inductors, thus providing bandwidth tuning with small passband ripple. As part of a direct conversion dual-mode 802.11b/Bluetooth receiver, a BiCMOS 5th order low-pass channel selection filter is designed. The filter operated from a single 2.5V supply and achieves a 76dB of out-of-band SFDR. A digital automatic tuning system is also implemented to account for process and temperature variations. As part of a Bluetooth transmitter, a low-power quadrature direct digital frequency synthesizer (DDFS) is presented. Piecewise linear approximation is used to avoid using a ROM look-up table to store the sine values in a conventional DDFS. Significant saving in power consumption, due to the elimination of the ROM, renders the design more suitable for portable wireless communication applications