OPTIMAL AREA AND PERFORMANCE MAPPING OF K-LUT BASED FPGAS

FPGA circuits are increasingly used in many fields: for rapid prototyping of new products (including fast ASIC implementation), for logic emulation, for producing a small number of a device, or if a device should be reconfigurable in use (reconfigurable computing). Determining if an arbitrary, given wide, function can be implemented by a programmable logic block, unfortunately, it is generally, a very difficult problem. This problem is called the Boolean matching problem. This paper introduces a new implemented algorithm able to map, both for area and performance, combinational networks using k-LUT based FPGAs.k-LUT based FPGAs, combinational circuits, performance-driven mapping.

Physics-based large-signal sensitivity analysis of microwave circuits using technological parametric sensitivity from multidimensional semiconductor device models

The authors present an efficient approach to evaluate the large-signal (LS) parametric sensitivity of active semiconductor devices under quasi-periodic operation through accurate, multidimensional physics-based models. The proposed technique exploits efficient intermediate mathematical models to perform the link between physics-based analysis and circuit-oriented simulations, and only requires the evaluation of dc and ac small-signal (dc charge) sensitivities under general quasi-static conditions. To illustrate the technique, the authors discuss examples of sensitivity evaluation, statistical analysis, and doping profile optimization of an implanted MESFET to minimize intermodulation which makes use of LS parametric sensitivities under two-tone excitatio