Characterisation and noise analysis of high Ge content p-channel SiGe MOSFETs fabricated using virtual substrates

This thesis demonstrates the advantages and disadvantages of investigated p-type SiGe MOSFETs with high Ge content Si1#xGex p-channel grown on Si1#yGey virtual substrate (VS) (x "0'7$0'9, y "0'3$0'5) in comparison with conventional Si devices. The ways to overcome current difficulties in conventional Si technology and mixed SiGe-Si technology are shown. Current-voltage (I-V) and capacitance-voltage (C-V) DC characteristics for p-channel Si/Si1#xGex/Si1#yGey hetero-MOSFETs with high Ge content (x "0'7$0'9, y"0'3$0'5) are reported. Enhancement in the maximum drain current for the p-SiGe devices in comparison with p-Si control is 2.5-3.0 times. DC characteristic simulations of SiGe p-channel MOSFETs were used to improve the accuracy of MOSFET and heterostructure parameters extraction. Calibrated during the simulation theoretical models were used for future design. The effective mobility, the source-drain access resistance, the doping profile, the layers thickness, oxide/semiconductor interface charge and other important characteristics were extracted. The effective mobility values, extracted for p-Si0%3Ge0%7 MOSFETs, exceed the hole mobility in a conventional Si p-MOS device by a factor of 3.5 and reach the mobility of conventional Si n-MOS transistors. The peak value of me f f = 760 cm2V#1s#1 at field 0.08 MVcm#1 was obtained for p-Si/Si0%2Ge0%8/ Si0%5Ge0%5 MOSFETs. Efficiency of special n-type doped layer, also known as "punch-through" stopper, introduced into heterostructure is shown. Perfect I-V and also low frequency noise characteristics of investigated MOSFET show that the p-type Si/Si1#xGex/Si1#yGey (x "0'7 $0'9, x$y "0'3$0'4) heterostructures with "punch-through" stopper could be very impressive opportunity to conventional Si for modern semiconductor industry. For the first time, quantitative explanation of the low frequency noise reduction in metamorphic, high Ge content, SiGe p-MOSFETs compared to Si p-MOSFETs have been proposed. Quantitative analysis demonstrates the importance of both carrier number fluctuations and correlated mobility fluctuations (CMF) components to the 1/ f noise of surface channel Si p-MOSFET, but the absence of CMF for buried channel p-Si0%3Ge0%7 and p- Si0%2Ge0%8 MOSFETs. The low frequency noise was measured to be three times smaller for a 0.55 mm effective gate length p-Si0%3Ge0%7 MOSFET than the Si control, at linear regime (VDS = -50 mV) and high gate overdrive voltage (Vgt= -1.5 V). This result is very important, because we have reduction in LF noise at high gate overdrive voltages, which are typical for analogue and power electronics application. Both DC and low frequency noise characteristics show that access source and drain resistance for metamorphic p-SiGe MOSFETs (RS +RD ,1.5-2.0kW !mm) roughly 2 times lower then for conventional p-Si MOSFETs

EUROSENSORS XVII : book of abstracts

Fundação Calouste Gulbenkien (FCG).Fundação para a Ciência e a Tecnologia (FCT)

Epitaxial PbZrxTi(1-x)O3 bilayers grown on silicon; giant electromechanical effects and their origin

This thesis investigates the crystallography, domain morphology and electromechanical behaviour of epitaxial PbZrxTi(1-x)O3 (PZT) bilayer heterostructures deposited on silicon. As a first step, PZT bilayers are deposited on SrTiO3 crystalline substrates by pulsed laser deposition, and their high temperature crystallography is investigated by X-ray diffraction (XRD). The profile of rhombohedral and tetragonal PZT structures with temperature shows excellent bulk-like behaviour with clear crystallographic phase transformations and coefficients of thermal expansion that are comparable with literature. Comparisons to theoretical relaxed films reveal how strain within the system is enough to modify the thermal properties of the films including increasing the Curie temperature for extended operation temperatures in practical applications. Next, thin films of tetragonal PbZr0.3Ti0.7O3 (PZT-T) of varying thickness are deposited above a 40 nm rhombohedral PbZr0.54Ti0.46O3 (PZT-R) film, all grown on silicon (100) substrates. XRD is performed on the samples and compared to the crystallographic dataset for bilayers on SrTiO3 substrates. XRD and transmission electron microscopy provide evidence that the PZT-T layer has a modified, pseudo-tetragonal structure due to substrate induced strain but maintains its in-plane a-axis orientation. The structure is observed to pass through a ferroelectric-paraelectric phase transformation with an increased Curie temperature. The domain morphology, characterised by piezoresponse force microscopy, reveals that the unequal lattice parameters of the pseudo-tetragonal structure are insufficiently different to reorient the polarisation. Instead, the film is arranged as ferroelastic a1/a2 tetragonal nanodomains within a larger array of mosaic superdomains. This remains unchanged with reduced film thickness, except for a smaller periodicity of the a1/a2 twins. Interestingly, the domain pattern gives rise to a series of topological defects including vortex/anti-vortex pairs at the surface and multi-phase coexisting core structures within the bulk of the PZT-T film. Finally, the electromechanical properties of the thin films on silicon are investigated, in both an out-of-plane and in-plane configuration. Ferroelectric polarisation switching experiments show a square hysteresis loop of saturation ~32 μC/cm2 and clear capacitance switching peaks. The experiments show that capacitance is doubled when measured in-plane, compared to out-of-plane, since ferroelectric properties are a function of electrode spacing, rather than film thickness, which can be three orders of magnitude larger. Single frequency piezo-hysteresis loops provide evidence of a ~250% improvement of the effective d33 response compared to a standard rhombohedral PZT film on SrTiO3 substrate. This is attributed to the coexisting multi-phases and mobile topological defects which demonstrate the ability to migrate the film surface or annihilate one another in the presence of a local bias. An improvement of this magnitude demonstrates the opportunity to implement bilayer technology while exploiting a functional silicon substrate for enhanced, industry-ready, smart material applications