An air-stable DPP-thieno-TTF copolymer for single-material solar cell devices and field effect transistors

Following an approach developed in our group to incorporate tetrathiafulvalene (TTF) units into conjugated polymeric systems, we have studied a low band gap polymer incorporating TTF as a donor component. This polymer is based on a fused thieno-TTF unit that enables the direct incorporation of the TTF unit into the polymer, and a second comonomer based on the diketopyrrolopyrrole (DPP) molecule. These units represent a donor–acceptor copolymer system, p(DPP-TTF), showing strong absorption in the UV–visible region of the spectrum. An optimized p(DPP-TTF) polymer organic field effect transistor and a single material organic solar cell device showed excellent performance with a hole mobility of up to 5.3 × 10–2 cm2/(V s) and a power conversion efficiency (PCE) of 0.3%, respectively. Bulk heterojunction organic photovoltaic devices of p(DPP-TTF) blended with phenyl-C71-butyric acid methyl ester (PC71BM) exhibited a PCE of 1.8%

Novel solution processable dielectrics for organic and graphene transistors

In this thesis we report the development of a range of high-performance thin-film transistors utilising different solution processable organic dielectrics grown at temperatures compatible with inexpensive substrate materials such as plastic. Firstly, we study the dielectric properties and application of a novel low-k fluoropolymer dielectric, named Hyflon AD (Solvay). The orthogonal nature of the Hyflon formulation, to most conventional organic semiconductors, allows fabrication of top-gate transistors with optimised semiconductor/dielectric interface. When used as the gate dielectric in organic transistors, this transparent and highly water-repellent polymer yields high-performance devices with excellent operating stability. In the case of top-gate organic transistors, hole and electron mobility values close to or higher than 1 cm2/Vs, are obtained. These results suggest that Hyflon AD is a promising candidate for use as dielectric in organic and potentially hybrid electronics. By taking advantage of the non-reactive nature of the Hyflon AD dielectric, the p-doping process of an organic blend semiconductor using a molybdenum based organometallic complex as the molecular dopant, has also been investigated for the first time. Although the much promising properties of Hyflon AD were demonstrated, the resulting transistors need, however, to be operated at high voltages typically in the range of 50-100 V. The latter results to a high power consumption by the discrete transistors as well as the resulting integrated circuits. Therefore, reduction in the operating voltage of these devices is crucial for the implementation of the technology in portable battery-operated devices. Our approach towards the development of low-voltage organic transistors and circuits explored in this work focused on the use of self-assembled monolayer (SAM) organics as ultra-thin gate dielectrics. Only few nanometres thick (2-5 nm), these SAM dielectrics are highly insulating and yield high geometrical capacitances in the range 0.5 - 1 μF/cm2. The latter has enabled the design and development of organic transistors with operating voltages down to a few volts. Using these SAM nanodielectrics high performance transistors with ambipolar transport characteristics have also been realised and combined to form low-voltage integrated circuits for the first time. In the final part of this thesis the potential of Hyflon AD and SAM dielectrics for application in the emerging area of graphene electronics, has been explored. To this end we have employed chemical vapour deposited (CVD) graphene layers that can be processed from solution onto the surface of the organic dielectric (Hyflon AD, SAM). By careful engineering of the graphene/dielectric interface we were able to demonstrate transistors with improved operating characteristics that include; high charge carrier mobility (~1400 cm2/Vs), hysteresis free operation, negligible unintentional doping and improved reliability as compared to bare SiO2 based devices. Importantly, the use of SAM nanodielectrics has enabled the demonstration of low voltage (<|1.5| V) graphene transistors that have been processed from solution at low temperature onto flexible plastic substrates. Graphene transistors with tuneable doping characteristics were also demonstrated by taking advantage of the SAM’s flexible chemistry and more specifically the type of the chemical SAM end-group employed. Overall, the work described in this thesis represents a significant step towards flexible carbon-based electronics where large-volume and low-temperature processing are required

Enhancing the Performance of Poly(3-Hexylthiophene) Based Organic Thin-Film Transistors Using an Interface Engineering Method

An original design and photolithographic fabrication process for poly(3-hexylthiophene-2, 5-diyl) (P3HT) based organic thin-film transistors (OTFTs) is presented. The structure of the transistors was based on the bottom gate bottom contact OTFT. The fabrication process was efficient, cost-effective, and relatively straightforward to implement. Current–voltage (I-V) measurements were performed to characterize the primary electronic properties of the transistors. The measured mobility of these transistors was significantly higher than most results reported in the literature for other similar bottom gate bottom contact P3HT OTFTs. The higher mobility is explained primarily by the effectiveness of the fabrication process in keeping the interfacial layers free from contamination, as well as the proper annealing of the P3HT. An interface engineering method is investigated to further enhance the performance of the OTFTs. Three interfacial materials were used for this purpose: graphene oxide (GO), poly(oligo (ethylene glycol) methyl ether methacrylate- glycidyl methacrylate- lauryl methacrylate) (P(OEGMA-GMA-LMA)) or POGL, and a composite of GO and P(OEGMA-GMA-LMA) or GO-POGL. The OTFTs with a GO interfacial layer were observed to have a higher drain current and field-effect mobility than the OTFTs with no interfacial layer. The enhanced drain current and mobility are associated with the particular structure of the P3HT layer on the dielectric surface and the reduction in the contact resistance between the GO-covered electrodes and the P3HT. The OTFTs with a POGL interfacial layer were observed to have a smaller threshold voltage than the OTFTs with no interfacial layer. The POGL OTFTs were also observed to have much more ideal drain current saturation characteristics with very small I-V curve slope. This is explained by the deep trap states on the POGL surface and the reduction of the contact resistance at the electrode/organic semiconductor interface. The OTFTs with a GO-POGL composite layer were observed to have a higher drain current and mobility, and a smaller threshold voltage than the OTFTs without an interfacial layer, which is the optimum case for these two device parameters. The higher drain current and field-effect mobility are attributed to the larger interconnecting grains of the P3HT that is deposited onto the GO-POGL surface and the smaller interfacial tension between the GO-POGL and the P3HT. The smaller threshold voltage is attributed to the deep trap states on the GO-POGL layer and the smaller contact resistance between the GO-POGL modified electrodes and the P3HT. Furthermore, experiments that could be performed to advance this research work and enhance the performance of the OTFTs even further are proposed

Polarization Modulation in Ferroelectric Organic Field-Effect Transistors

The polarization modulation effect of the gate dielectric on the performance of metal-oxide-semiconductor field-effect transistors has been investigated for more than a decade. However, there are no comparable studies in the area of organic field-effect transistors (FETs) using polymer ferroelectric dielectrics, where the effect of polarization rotation by 90 is examined on the FET characteristics. We demonstrate the effect of polarization rotation in a relaxor ferroelectric dielectric, poly(vinylidene fluoride trifluorethylene) (PVDF-TrFE), on the performance of small-molecule-based organic FETs. The subthreshold swing and other transistor parameters in organic FETs can be controlled in a reversible fashion by switching the polarization direction in the PVDF-TrFE layer. X-ray diffraction and electron microscopy images from PVDF-TrFE reveal changes in the ferroelectric phase and domain size, respectively, upon rotating the external electric field by 90. The structural changes corroborate density-functional-theoretical studies of an oligomer of the ferroelectric molecule in the presence of an applied electric field. The strategies enumerated here for polarization orientation of the polymer ferroelectric dielectric are applicable for a wide range of polymeric and organic transistors

Solution processed molecular floating gate for flexible flash memories

Solution processed fullerene (C60) molecular floating gate layer has been employed in low voltage nonvolatile memory device on flexible substrates. We systematically studied the charge trapping mechanism of the fullerene floating gate for both p-type pentacene and n-type copper hexadecafluorophthalocyanine (F16CuPc) semiconductor in a transistor based flash memory architecture. The devices based on pentacene as semiconductor exhibited both hole and electron trapping ability, whereas devices with F16CuPc trapped electrons alone due to abundant electron density. All the devices exhibited large memory window, long charge retention time, good endurance property and excellent flexibility. The obtained results have great potential for application in large area flexible electronic devices

Polarization-induced transport in ferroelelctric organic field-effect transistors

In this research we study the role of ferroelectric dielectrics in organic field-effect transistors (FETs) to understand the mechanism of charge transport in organic semiconductors. The ferroelectric nature of the polymer, poly(vinylidene fluoride) (PVDF)), has been known for over 45 years. However, its role in interfacial transport in organic/polymeric FETs is not that well understood. PVDF and its copolymer, polyvinylidene fluoride-trifluoroethylene (PVDF-TrFE), as a dielectric in organic FETs is a perfect test-bed for conducting transport studies where a systematic tuning of the dielectric constant with temperature may be achieved. By choosing small molecule organic semiconductors -- pentacene and 6,13 bis(triisopropylsilylethynyl)pentacene (TIPS-pentacene) -- along with a copolymer PVDF-TrFE as the dielectric layer, the FET characteristics are monitored as a function of temperature. Pentacene FETs show a weak temperature dependence of the charge carrier mobility in the ferroelectric phase of PVDF-TrFE, which is attributed to polarization fluctuation driven transport resulting from a coupling of the charge carriers to the surface phonons of the dielectric layer. A negative coefficient of carrier mobility is observed in TIPS-pentacene upwards of 200 K with the ferroelectric dielectric, while an activated transport is observed with non-ferroelectric dielectrics. We show that this behavior is correlated with the nature of the trap states in TIPS-pentacene. We also developed the method of dipole engineering of the PVDF-TrFE films to enhance the properties of organic FETs. PVDF-TrFE, despite its applications in a vast range of work (including as a gate dielectric in organic FET and sensing applications) poses concerns such as higher conductivity compared to other polymer non-ferroelectric dielectrics. We have come up with new methods of electrical poling the dielectric layer to enhance FET performance as well as reduce gate leakage issues. We demonstrate the effect of polarization rotation in PVDF-TrFE on the performance of small-molecule-based organic FETs. The subthreshold swing and other transistor parameters in organic FETs can be controlled in a reversible fashion by switching the polarization direction in the PVDF-TrFE layer. We further demonstrate a novel method of selective poling of the dielectric layer. By using solution processed TIPS-pentacene as the organic semiconductor, it is shown that textured poling of the PVDF-TrFE layer dramatically improves FET properties compared to unpoled or uniformly poled ferroelectric films. The texturing is achieved by first vertically poling the PVDF-TrFE film and then laterally poling the dielectric layer close to the gate electrode. TIPS-pentacene FETs show on/off ratios of 105 and hole mobilities of 1 cm2/Vs under ambient conditions with operating voltages well below-4 V. This research opens prospects of achieving low-operating FETs without any expensive patterning techniques.Includes bibliographical reference

Crosslinked polymeric dielectric materials and electronic devices incorporating same

Solution-processable dielectric materials are provided, along with precursor compositions and processes for preparing the same. Composites and electronic devices including the dielectric materials also are provided

Influence of bank geometry on the electrical characteristics of printed organic field-effect transistors

The electrical characteristics of organic field-effect transistors (OFETs) based on small-molecule organic semiconductors (OSCs) have been significantly improved by employing various fabrication techniques in solution processes to enhance the OSC crystallinity. However, complicated fabrication and inhomogeneity of OFETs remain as challenges before commercialization. In this work, we have efficiently controlled the size and orientation of 6,13-bis(triisopropylsilylethynyl)-pentacene (TIPS-pentacene) crystalline domains by tuning the Cytop bank dimension, in which OSC inks are printed, to improve the device performance. The optimized bank pattern forms uniform thin film morphology and well-aligned TIPS-pentacene crystalline domains along the charge transport direction, resulting in four-fold increase in field-effect mobility and one third reduction in relative standard deviation.11Ysciescopu

Light programmable organic transistor memory device based on hybrid dielectric

We have fabricated the transistor memory devices based on SiO2 and polystyrene (PS) hybrid dielectric. The trap states densities with different semiconductors have been investigated and a maximum 160V memory window between programming and erasing is realized. For DNTT based transistor, the trapped electron density is limited by the number of mobile electrons in semiconductor. The charge transport mechanism is verified by light induced Vth shift effect. Furthermore, in order to meet the low operating power requirement of portable electronic devices, we fabricated the organic memory transistor based on AlOx/self-assembly monolayer (SAM)/PS hybrid dielectric, the effective capacitance of hybrid dielectric is 210 nF cm-2 and the transistor can reach saturation state at -3V gate bias. The memory window in transfer I-V curve is around 1V under +/-5V programming and erasing bias. © 2013 SPIE.published_or_final_versio