Optical multi-context scrubbing operation on a redundant system

This paper presents a proposal of the world-first optical multi-context scrubbing operation on a redundant system that can maintain the state of a sequential circuit and the operation continuously without any interruption on a radiation-hardened optically reconfigurable gate array even after a permanent failure suddenly happens on the sequential circuit or a flip-flop by radiation. Up to now, a high-speed optical scrubbing operation has been demonstrated on a radiation-hardened optically reconfigurable gate array. In addition, a multi-context scrubbing operation based on the high-speed optical scrubbing operation has already been demonstrated. Although the multi-context scrubbing operation presents the benefit that it can treat both soft errors and permanent failures caused by radiation simultaneously, the conventional contributions have never presented how to maintain the state of a sequential circuit after a permanent failure occurs on flip-flops. Therefore, in the conventional multi-context scrubbing operation, all the operations must be restarted from the initial condition each time a permanent failure occurs on a programmable gate array. As a result, conventional multi-context scrubbing operations could not be applied for real-time systems. The proposed optical multi-context scrubbing method that can solve the issue has been experimentally evaluated on a radiation-hardened optically reconfigurable gate array

High-Performance, Radiation-Hardened Electronics for Space and Lunar Environments

The Radiation Hardened Electronics for Space Environments (RHESE) project develops advanced technologies needed for high performance electronic devices that will be capable of operating within the demanding radiation and thermal extremes of the space, lunar, and Martian environment. The technologies developed under this project enhance and enable avionics within multiple mission elements of NASA's Vision for Space Exploration. including the Constellation program's Orion Crew Exploration Vehicle. the Lunar Lander project, Lunar Outpost elements, and Extra Vehicular Activity (EVA) elements. This paper provides an overview of the RHESE project and its multiple task tasks, their technical approaches, and their targeted benefits as applied to NASA missions

Radiation-Hardened Data Acquisition System Based on a Mask-programmable Analog Array

Data acquisition systems capable of extreme temperature and radiation environments are of dire need in an era of great nuclear energy generation. Efforts to respond to recent nuclear accidents, such as those caused by natural disasters at Fukushima, have suffered in promptness and effectiveness due to the lack of information gathered from these sites. Currently, there are no systems available that accurately acquire, digitize, and remotely report this data in the presence of harsh radiation. Using a mask-programmable analog array prototype chip designed for Triad Semiconductor and an FMI frequency synthesizer, both verified to beyond 300 kRad and 125ºC and capable of analog signal conditioning and digitization, a radiation-hardened data acquisition system is produced. This system will report three parameters of importance to the assessment of a nuclear reactor environment: gamma radiation, temperature, and pressure. Through a three-task development process, the discrete part selection and overall system will be outlined, detailed board design will be shown, and end-to-end system calibration and radiation testing will be performed and analyzed. The evaluation of target environments will provide specifications for system performance, as well as determine successful completion of the work

Identifying Worst-Case Test Vectors for Delay Failures Induced by Total Dose in Flash- based FPGA

A thesis presented on the effects of space radiation on the flash-based FPGA leading to failure with applying a proposed fault model to identify the worst, nominal and best-case test vectors for each. This thesis analyzed the delay failure induced in a flash-based field programmable gate array (FPGA) by a total-ionizing dose. It then identified the different factors contributing to the amount of delay induced by the total dose in the FPGA. A novel fault model for delay failure in FPGA was developed. This fault model was used to identify worst-case test vectors for delay failures induced in FPGA devices exposed to a total ionizing dose. The fault model and the methodology for identifying worst-case test vectors WCTV were validated using Micro-semi ProASIC3 FPGA and Cobalt 60 radiation facility

Radiation Characteristics of a 0.11 Micrometer Modified Commercial CMOS Process

We present radiation data, Total Ionizing Dose and Single Event Effects, on the LSI Logic 0.11 micron commercial process and two modified versions of this process. Modified versions include a buried layer to guarantee Single Event Latchup immunity

Radiation Tolerant Electronics, Volume II

Research on radiation tolerant electronics has increased rapidly over the last few years, resulting in many interesting approaches to model radiation effects and design radiation hardened integrated circuits and embedded systems. This research is strongly driven by the growing need for radiation hardened electronics for space applications, high-energy physics experiments such as those on the large hadron collider at CERN, and many terrestrial nuclear applications, including nuclear energy and safety management. With the progressive scaling of integrated circuit technologies and the growing complexity of electronic systems, their ionizing radiation susceptibility has raised many exciting challenges, which are expected to drive research in the coming decade.After the success of the first Special Issue on Radiation Tolerant Electronics, the current Special Issue features thirteen articles highlighting recent breakthroughs in radiation tolerant integrated circuit design, fault tolerance in FPGAs, radiation effects in semiconductor materials and advanced IC technologies and modelling of radiation effects

Développement de circuits logiques programmables résistants aux alas logiques en technologie CMOS submicrométrique

The electronics associated to the particle detectors of the Large Hadron Collider (LHC), under construction at CERN, will operate in a very harsh radiation environment. Most of the microelectronics components developed for the first generation of LHC experiments have been designed with very precise experiment-specific goals and are hardly adaptable to other applications. Commercial Off-The-Shelf (COTS) components cannot be used in the vicinity of particle collision due to their poor radiation tolerance. This thesis is a contribution to the effort to cover the need for radiation-tolerant SEU-robust programmable components for application in High Energy Physics (HEP) experiments. Two components are under development: a Programmable Logic Device (PLD) and a Field-Programmable Gate Array (FPGA). The PLD is a fuse-based, 10-input, 8-I/O general architecture device in 0.25 micron CMOS technology. The FPGA under development is instead a 32x32 logic block array, equivalent to ~25k gates, in 0.13 micron CMOS. This work focussed also on the research for an SEU-robust register in both the mentioned technologies. The SEU-robust register is employed as a user data flip-flop in the FPGA and PLD designs and as a configuration cell as well in the FPGA design

Development of the analog ASIC for multi-channel readout X-ray CCD camera

We report on the performance of an analog application-specific integrated circuit (ASIC) developed aiming for the front-end electronics of the X-ray CCDcamera system onboard the next X-ray astronomical satellite, ASTRO-H. It has four identical channels that simultaneously process the CCD signals. Distinctive capability of analog-to-digital conversion enables us to construct a CCD camera body that outputs only digital signals. As the result of the front-end electronics test, it works properly with low input noise of =<30 uV at the pixel rate below 100 kHz. The power consumption is sufficiently low of about 150 mW/chip. The input signal range of 720 mV covers the effective energy range of the typical X-ray photon counting CCD (up to 20 keV). The integrated non-linearity is 0.2% that is similar as those of the conventional CCDs in orbit. We also performed a radiation tolerance test against the total ionizing dose (TID) effect and the single event effect. The irradiation test using 60Co and proton beam showed that the ASIC has the sufficient tolerance against TID up to 200 krad, which absolutely exceeds the expected amount of dose during the period of operating in a low-inclination low-earth orbit. The irradiation of Fe ions with the fluence of 5.2x10^8 Ion/cm2 resulted in no single event latchup (SEL), although there were some possible single event upsets. The threshold against SEL is higher than 1.68 MeV cm^2/mg, which is sufficiently high enough that the SEL event should not be one of major causes of instrument downtime in orbit.Comment: 16 pages, 6 figure

A Robust Strategy for Total Ionizing Dose Testing of Field Programmable Gate Arrays

We present a novel method of FPGA TID testing that measures propagation delay between flip-flops operating at maximum speed. Measurement is performed on-chip at-speed and provides a key design metric when building system-critical synchronous designs