Strained Si heterojunction bioploar transistors

This dissertation addresses the world’s first demonstration of strained Si Heterojunction Bipolar Transistors (sSi HBTs). The conventional SiGe Heterojunction Bipolar Transistor (SiGe HBT), which was introduced as a commercial product in 1999 (after its first demonstration in 1988), has become an established device for high-speed applications. This is due to its excellent RF performance and compatibility with CMOS processing. It has enabled silicon-based technology to penetrate the rapidly growing market for wide bandwidth and wireless telecommunications once reserved for more expensive III–V technologies. SiGe HBTs is realised by the pseudomorphic growth of SiGe on a Si substrate, which allows engineering of the base region to improve performance. In this way the base has a smaller energy band gap than the emitter, which increases the gain. The energy band gap of SiGe reduces with increasing Ge composition, but the maximum Ge composition is limited by the amount of strain that can be accommodated within a given base layer thickness. Therefore, a new innovation is necessary to overcome this limitation and meet the continuous demand for high speed devices. Growing the SiGe base layer over a relaxed SiGe layer (Strain Relaxed Buffer) can increase the amount of Ge that can be incorporated in the base, hence, increasing the device performance. In this thesis, experimental data is presented to demonstrate the realisation of sSi HBTs. The performance of this novel device has been also investigated and explained using TCAD tool.EThOS - Electronic Theses Online ServiceEngineering and Physical Sciences Research CouncilGBUnited Kingdo

Operation of silicon-germanium heterojunction bipolar transistors on silicon-on-insulator in extreme environments

Recently, several SiGe HBT devices fabricated on CMOS-compatible silicon on insulator (SOI) substrates (SiGe HBTs-on-SOI) have been demonstrated, combining the well-known SiGe HBT performance with the advantages of SOI substrates. These new devices are especially interesting in the context of extreme environments - highly challenging surroundings that lie outside commercial and even military electronics specifications. However, fabricating HBTs on SOI substrates instead of traditional silicon bulk substrates requires extensive modifications to the structure of the transistors and results in significant trade-offs. The present work investigates, with measurements and TCAD simulations, the performance and reliability of SiGe heterojunction bipolar transistors fabricated on silicon on insulator substrates with respect to operation in extreme environments such as at extremely low or extremely high temperatures or in the presence of radiation (both in terms of total ionizing dose and single effect upset).Ph.D.Committee Chair: Cressler, John D.; Committee Member: Papapolymerou, John; Committee Member: Ralph, Stephen; Committee Member: Shen, Shyh-Chiang; Committee Member: Zhou, Hao Mi

Characterization and modeling the effect of temperature on power HBTs InGaP/GaAs

The variation and stability of HBT’s parameters at different temperatures are important for utilizing these devices in high-power integrated circuits. The temperature dependence of the DC current gain of bipolar transistors, as a key device parameter, has been extensively investigated. A major issue of the power HBT’s is that the current gain is decreased with junction temperature due to self-heating effect. Hence, how to stabilize the DC current gain and RF performances is important issue to develop the power HBTs. This work describes the DC and high-frequency temperature dependence of InGaP/GaAs HBT’s. The substrate temperature (T) was varied from 25 to 150°C. The static and dynamic performances of the HBT are degraded at high temperature, due to the reduced of carrier mobility with increasing temperature. The current gain (β) decreases at high temperatures; from 140 to 127 at 25 to 150°C, while the decreases in the peak Ft and Fmax are observed from about 110 GHz to 68 GHz and from 165 GHz to 53 GHz respectively in the temperature range of 25 to 150°C

Low-frequency noise in downscaled silicon transistors: Trends, theory and practice

By the continuing downscaling of sub-micron transistors in the range of few to one deca-nanometers, we focus on the increasing relative level of the low-frequency noise in these devices. Large amount of published data and models are reviewed and summarized, in order to capture the state-of-the-art, and to observe that the 1/area scaling of low-frequency noise holds even for carbon nanotube devices, but the noise becomes too large in order to have fully deterministic devices with area less than 10nm×10nm. The low-frequency noise models are discussed from the point of view that the noise can be both intrinsic and coupled to the charge transport in the devices, which provided a coherent picture, and more interestingly, showed that the models converge each to other, despite the many issues that one can find for the physical origin of each model. Several derivations are made to explain crossovers in noise spectra, variable random telegraph amplitudes, duality between energy and distance of charge traps, behaviors and trends for figures of merit by device downscaling, practical constraints for micropower amplifiers and dependence of phase noise on the harmonics in the oscillation signal, uncertainty and techniques of averaging by noise characterization. We have also shown how the unavoidable statistical variations by fabrication is embedded in the devices as a spatial “frozen noise”, which also follows 1/area scaling law and limits the production yield, from one side, and from other side, the “frozen noise” contributes generically to temporal 1/f noise by randomly probing the embedded variations during device operation, owing to the purely statistical accumulation of variance that follows from cause-consequence principle, and irrespectively of the actual physical process. The accumulation of variance is known as statistics of “innovation variance”, which explains the nearly log-normal distributions in the values for low-frequency noise parameters gathered from different devices, bias and other conditions, thus, the origin of geometric averaging in low-frequency noise characterizations. At present, the many models generally coincide each with other, and what makes the difference, are the values, which, however, scatter prominently in nanodevices. Perhaps, one should make some changes in the approach to the low-frequency noise in electronic devices, to emphasize the “statistics behind the numbers”, because the general physical assumptions in each model always fail at some point by the device downscaling, but irrespectively of that, the statistics works, since the low-frequency noise scales consistently with the 1/area law

SILICON-GERMANIUM HETEROJUNCTION BIPOLAR TRANSISTORS FOR LARGE-SCALE LOW-POWER CRYOGENIC SENSING SYSTEMS

Cryogenic low noise amplifiers (LNAs) are one of the key components in many emerging applications such as radio astronomy or quantum computing in which a weak incoming signal needs to be read out. There have been extensive studies on the feasibility of leveraging silicon-germanium (SiGe) heterojunction bipolar transistors (HBTs) to implement cryogenic LNAs in the past. The deployment of such LNAs in the future large-scale systems in radio astronomy or quantum computing is contingent upon the possibility of developing LNAs with reduced DC power dissipation to enable the cooling of a large number of array elements inside a cryogenic cooler. In this dissertation, we focus on the cryogenic operation of SiGe HBTs at reduced supply voltages for the implementation of ultra low- power LNAs and their applications for scalable receiver systems. In addition, the limitations of the SiGe HBT cryogenic models for the operation at high current densities are investigated for the implementation of modern high speed SiGe HBT circuits

Design, scaling and reliability of devices for high-performance mixed-signal applications

This research investigates and gains new understanding on how silicon-germanium (SiGe) heterojunction bipolar transistor (HBT) device design couples with both performance scaling and reliability for mixed-signal applications (high-frequency and analog). In addition, this work provides methods of using this knowledge to enhance the predictive modeling of performance and reliability for these devices. The primary objective of this effort is to develop a predictive device modeling methodology and simulation framework that can be used to design new mixed-signal device technologies, and can then be used to assess the device performance and reliability concurrently. Ultimately, the goal is to highlight the need for device performance and reliability in a circuit environment, and establish best practices for practical modeling of these constraints and any resulting trade-offs. To support this objective, several specific areas were targeted to fill the existing gaps in knowledge. This includes developing a technology computer-aided-design (TCAD) based integrated simulation framework and methodology to study performance scaling and reliability in complementary SiGe HBTs; identifying factors determining the predictive nature of the simulated device figures-of-merit (FoM); studying electrothermal constraints for scaling SiGe HBTs on thick-film silicon-on-insulator (SOI) to understand its impact on the DC and RF safe-operating-area (SOA) for the device; and performing reliability studies of hot-carrier damage and annealing in npn and pnp SiGe HBT devices in an effort to gain insight into the physical mechanisms involved and to develop fundamental understanding to aid TCAD modeling of hot-carrier damage in these devices. All of these individual studies resulting from the main research tasks are harmoniously tied together by a central theme: to develop a fundamental understanding about how the device design factors influence both performance scaling and reliability. Some of the key existing challenges and knowledge gaps are addressed by analyzing and reconciling the experimental data with simulation results.Ph.D

Extreme environment operation of thick-film SOI SiGe HBTs in both high temperature & radiation-rich environments

The objective of this work is to characterize and investigate the effect of extreme environments, such as high temperature (up to 300$^\circ$C) and radiation, on the response of thick-film SOI SiGe HBTs. Two different SiGe platforms are explored in this work with one aimed at RF applications (180 GHz f\textsubscript{max}) and the other aimed at high performance and high voltage (up to 48V) analog applications (20 GHz f\textsubscript{max}). To the best of the author's knowledge, this is the first look into the 300$^\circ$C operation of thick-film SOI SiGe HBTs and the effect of TID on a high-voltage complementary SiGe platform. Chapter 1 presents a brief overview and summary of the SiGe technology. The effect of incorporating Ge in a Si BJT is emphasized and is quantitatively described. Chapter 2 presents the high temperature (to 300$^\circ$C) DC and AC performance of a $>$ 100 GHz f\textsubscript{T}/f\textsubscript{max} SiGe HBTs on thick-film SOI. Metrics such as current gain ($\beta$\textsubscript{F}), BV\textsubscript{CEO}, M-1, f\textsubscript{T}, f\textsubscript{max} are extracted from 24$^\circ$C to 300$^\circ$C and compared with a bulk SiGe HBT platform. The results demonstrate that while there are degradation to key device metrics at high temperatures, the devices are still usable over a wide temperature range. Additionally, while SOI is known for its high thermal resistance, it is demonstrated that the device is constrained by electrical effects rather than thermal effects at higher temperatures, which should therefore yield acceptable reliability. This work was presented at the IEEE Bipolar/BiCMOS Circuits and Technology Meeting 2015 \cite{omprakash_2015}. Chapter 3 presents the impact of total ionizing dose (TID) on a high-voltage (36V) complementary SiGe on SOI technology, including the effects of irradiation and bias on the device oxides and the implications on forward and inverse-mode device operation. The results indicate a multi-Mrad tolerance to TID similar to other SiGe HBTs, however, they illustrate a slightly anomalous behavior at high injection due to a decrease in collector resistance. A clear difference between forward mode and inverse mode response is also observed with bias. This work was submitted for the IEEE Nuclear and Space Radiation Effects Conference 2016. Chapter 4 provides a summary of the contributions presented in this thesis. Additionally, it outlines the future work to be done based on the current research.M.S