18,180 research outputs found

    Design Methodology of Very Large Scale Integration

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    Very Large Scale Integration (VLSI) deals with systems complexity rather than transistor size or circuit performance. VLSI design methodology is supported by Computer Aided Design (CAD) and Design Automation (DA) tools, which help VLSI designers to implement more complex and guaranteed designs. The increasing growth in VLSI complexity dictates a hierarchical design approach and the need for hardware DA tools. This paper discusses the generalized Design Procedure for CAD circuit design; the commercial CADs offered by CALMA and the Caesar System, supported by the Berkeley design tools. A complete design of a Content Addressable Memory (CAM) cell, using the Caesar system, supported by Berkeley CAD tools, is illustrated

    ASIC design of an IIR digital filter: Using Mentor Graphics DSP Station Tools

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    Automation in VLSI design is a powerful way to simplify the VLSI layout process and will allow for faster time to market for integrated circuit designs. One means of automation is VHDL, a hardware description language for integrated circuit designs. A structured VHDL description can be used to describe the hardware design at the logic-gate level, and automated software is available that will use this gate-level design to generate the VLSI layout. A more recent type of automation occurs at a level above this. The Mentor Graphics DSP Station tools use a high-level algorithmic description to generate the gate-level VHDL description. These tools are especially intended for applications in digital signal processing (DSP), providing simulation tools particularly geared toward DSP algorithms. One application of digital signal processing is an infinite impulse response (IIR) filter. With the use of the Mentor Graphics tools, a digital filter was designed from a set of original specifications down to the silicon level. N-well 1.2 micron CMOS technology with two metal layers and one polysilicon layer was used to implement the filter layout. Using the 1.2 micron CMOSN standard cell library, the final VLSI layout measured 7.315 mm x 7.213 mm, containing approximately 25,700 transistors

    A Cellular, Language Directed Computer Architecture

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    If a VLSI computer architecture is to influence the field of computing in some major way, it must have attractive properties in all important aspects affecting the design, production, and the use of the resulting computers. A computer architecture that is believed to have such properties is briefly discussed
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