12,414 research outputs found
Sensornet checkpointing: enabling repeatability in testbeds and realism in simulations
When developing sensor network applications, the shift from
simulation to testbed causes application failures, resulting in additional
time-consuming iterations between simulation and testbed. We propose
transferring sensor network checkpoints between simulation and testbed
to reduce the gap between simulation and testbed. Sensornet checkpointing
combines the best of both simulation and testbeds: the nonintrusiveness
and repeatability of simulation, and the realism of testbeds
An approach to real-time simulation using parallel processing
A preliminary simulator design that uses a parallel computer organization to provide accuracy, portability, and low cost is presented. The hardware and software for this prototype simulator are discussed. A detailed discussion of the inter-computer data transfer mechanism is also presented
Building real-time embedded applications on QduinoMC: a web-connected 3D printer case study
Single Board Computers (SBCs) are now emerging
with multiple cores, ADCs, GPIOs, PWM channels, integrated
graphics, and several serial bus interfaces. The low power
consumption, small form factor and I/O interface capabilities of
SBCs with sensors and actuators makes them ideal in embedded
and real-time applications. However, most SBCs run non-realtime
operating systems based on Linux and Windows, and do
not provide a user-friendly API for application development. This
paper presents QduinoMC, a multicore extension to the popular
Arduino programming environment, which runs on the Quest
real-time operating system. QduinoMC is an extension of our earlier
single-core, real-time, multithreaded Qduino API. We show
the utility of QduinoMC by applying it to a specific application: a
web-connected 3D printer. This differs from existing 3D printers,
which run relatively simple firmware and lack operating system
support to spool multiple jobs, or interoperate with other devices
(e.g., in a print farm). We show how QduinoMC empowers devices with the capabilities to run new services without impacting their timing guarantees. While it is possible to modify existing operating systems to provide suitable timing guarantees, the effort to do so is cumbersome and does not provide the ease of programming afforded by QduinoMC.http://www.cs.bu.edu/fac/richwest/papers/rtas_2017.pdfAccepted manuscrip
Distributed Real-Time Emulation of Formally-Defined Patterns for Safe Medical Device Control
Safety of medical devices and of their interoperation is an unresolved issue
causing severe and sometimes deadly accidents for patients with shocking
frequency. Formal methods, particularly in support of highly reusable and
provably safe patterns which can be instantiated to many device instances can
help in this regard. However, this still leaves open the issue of how to pass
from their formal specifications in logical time to executable emulations that
can interoperate in physical time with other devices and with simulations of
patient and/or doctor behaviors. This work presents a specification-based
methodology in which virtual emulation environments can be easily developed
from formal specifications in Real-Time Maude, and can support interactions
with other real devices and with simulation models. This general methodology is
explained in detail and is illustrated with two concrete scenarios which are
both instances of a common safe formal pattern: one scenario involves the
interaction of a provably safe pacemaker with a simulated heart; the other
involves the interaction of a safe controller for patient-induced analgesia
with a real syringe pump.Comment: In Proceedings RTRTS 2010, arXiv:1009.398
Advanced software techniques for space shuttle data management systems Final report
Airborne/spaceborn computer design and techniques for space shuttle data management system
Fault-free performance validation of fault-tolerant multiprocessors
A validation methodology for testing the performance of fault-tolerant computer systems was developed and applied to the Fault-Tolerant Multiprocessor (FTMP) at NASA-Langley's AIRLAB facility. This methodology was claimed to be general enough to apply to any ultrareliable computer system. The goal of this research was to extend the validation methodology and to demonstrate the robustness of the validation methodology by its more extensive application to NASA's Fault-Tolerant Multiprocessor System (FTMP) and to the Software Implemented Fault-Tolerance (SIFT) Computer System. Furthermore, the performance of these two multiprocessors was compared by conducting similar experiments. An analysis of the results shows high level language instruction execution times for both SIFT and FTMP were consistent and predictable, with SIFT having greater throughput. At the operating system level, FTMP consumes 60% of the throughput for its real-time dispatcher and 5% on fault-handling tasks. In contrast, SIFT consumes 16% of its throughput for the dispatcher, but consumes 66% in fault-handling software overhead
Verification of the Tree-Based Hierarchical Read-Copy Update in the Linux Kernel
Read-Copy Update (RCU) is a scalable, high-performance Linux-kernel
synchronization mechanism that runs low-overhead readers concurrently with
updaters. Production-quality RCU implementations for multi-core systems are
decidedly non-trivial. Giving the ubiquity of Linux, a rare "million-year" bug
can occur several times per day across the installed base. Stringent validation
of RCU's complex behaviors is thus critically important. Exhaustive testing is
infeasible due to the exponential number of possible executions, which suggests
use of formal verification.
Previous verification efforts on RCU either focus on simple implementations
or use modeling languages, the latter requiring error-prone manual translation
that must be repeated frequently due to regular changes in the Linux kernel's
RCU implementation. In this paper, we first describe the implementation of Tree
RCU in the Linux kernel. We then discuss how to construct a model directly from
Tree RCU's source code in C, and use the CBMC model checker to verify its
safety and liveness properties. To our best knowledge, this is the first
verification of a significant part of RCU's source code, and is an important
step towards integration of formal verification into the Linux kernel's
regression test suite.Comment: This is a long version of a conference paper published in the 2018
Design, Automation and Test in Europe Conference (DATE
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