Influence of Input/output Operations on Processor Performance

Nowadays, computers are frequently equipped with peripherals that transfer great amounts of data between them and the system memory using direct memory access techniques (i.e., digital cameras, high speed networks, . . . ). Those peripherals prevent the processor from accessing system memory for significant periods of time (i.e., while they are communicating with system memory in order to send or receive data blocks). In this paper we study the negative effects that I/O operations from computer peripherals have on processor performance. With the help of a set of routines (SMPL) used to make discrete event simulators, we have developed a configurable software that simulates a computer processor and main memory as well as the I/O scenarios where the periph-erals operate. This software has been used to analyze the performance of four different processors in four I/O scenarios: video capture, video capture and playback, high speed network, and serial transmission

Visualization tool for computer architects

Thesis (M. Eng.)--Massachusetts Institute of Technology, Dept. of Electrical Engineering and Computer Science, 2004.Includes bibliographical references (leaves 54-55).As computer architectures continue to grow in complexity, software developers and hardware engineers cope with the increasing complexity by developing proprietary applications, simulations and tool sets to understand the behavior of these complex systems. Although the field of information visualization is leading to powerful applications in many areas, information visualization applications for computer architecture development are either tightly coupled with a specific architecture or target a wide range of computer system data. This thesis introduces the Visualization Tool for Computer Architects (VISTA) Environment. The VISTA Environment is an extensible and modular information visualization environment for hardware engineers, software developers and educators to visualize data from a variety of computer architecture simulations at different levels of abstraction. The VISTA Environment leverages common attributes in simulation data, computer architecture visualizations, and computer architecture development methods to create a powerful information visualization environment to aid in designing, understanding and communicating complex computer architectures.by Aaron D. Mihalik.M.Eng

Maximizing resource utilization by slicing of superscalar architecture

Superscalar architectural techniques increase instruction throughput from one instruction per cycle to more than one instruction per cycle. Modern processors make use of several processing resources to achieve this kind of throughput. Control units perform various functions to minimize stalls and to ensure a continuous feed of instructions to execution units. It is vital to ensure that instructions ready for execution do not encounter a bottleneck in the execution stage; This thesis work proposes a dynamic scheme to increase efficiency of execution stage by a methodology called block slicing. Implementing this concept in a wide, superscalar pipelined architecture introduces minimal additional hardware and delay in the pipeline. The hardware required for the implementation of the proposed scheme is designed and assessed in terms of cost and delay. Performance measures of speed-up, throughput and efficiency have been evaluated for the resulting pipeline and analyzed

Hierarchical architecture design and simulation environment

The Hierarchical Architectural design and Simulation Environment (HASE)is intended as a flexible tool for computer architects who wish to experiment with alternative architectural configurations and design parameters. HASE is both a design environment and a simulator. Architecture components are described by a hierarchical library of objects defined in terms of an object oriented simulation language. HASE instantiates these objects to simulate and animate the execution of a computer architecture. An event trace generated by the simulator therefore describes the interaction between architecture components, for example, fetch stages, address and data buses, sequencers, instruction buffers and register files. The objects can model physical components at different abstraction levels, eg. PMS (processor memory switch), ISP (instruction set processor) and RTL (register transfer level). HASE applies the concepts of inheritance, encapsulation and polymorphism associated with object orientation, to simplify the design and implementation of an architecture simulation that models component operations at different abstraction levels. For example, HASE can probe the performance of a processor's floating point unit, executing a multiplication operation, at a lower level of abstraction, i.e. the RTL, whilst simulating remaining architecture components at a PMS level of abstraction. By adopting this approach, HASE returns a more meaningful and relevant event trace from an architecture simulation. Furthermore, an animator visualises the simulation's event trace to clarify the collaborations and interactions between architecture components. The prototype version of HASE is based on GSS (Graphical Support System), and DEMOS (Discrete Event Modelling On Simula)

Methodology for designing simulators of computer architecture and organization

У овом раду се разматра методолошки приступ дизајну симулатора из области архитектуре и организације рачунара који треба да омогући развој симулатора дигиталних система произвољног нивоа сложености способних за рад у конкурентном и дистрибуираном окружењу. Да би се омогућио формирање методологије на почетку рада је приказан преглед наставе у области архитектуре и организације рачунара на основним студијама, као и преглед области пројектовања симулатора где је посебан акценат био стављен на области конкурентног и дистрибуираног програмирања које студенти треба да познају као би могли да развију симулаторе који омогућавају рад у таквом окружењу. На основу спроведене евалуације симулатора који се користе у настави из области архитектуре и организације рачунара а који имају расположив изворни код предложено је решење које се заснива на коришћењу слојевите архитектуре код које је сваки слој одговоран за други вид обраде и комуникације. Предложено решење се састоји из коришћења пет слојева: логичког, извршног, презентационог, симулационог, и слоја физике. Детаљи везани за процедуре и објашњења техника које се користе за реализацију ових слојева су приказани у раду. За сваки слој предложеног решења је дат аналитички модел процене времена извршавања симулације у зависности од улазних параметара приликом рада у конкурентном и дистрибуираном окружењу. Централни део рада описује симулатор дискретних догађаја опште намене развијен према описаној методологији као симулатор архитектуре и организације рачунара који је способан за рад у конкурентном и дистрибуираном окружењу. Опис симулатора и његових делова је дат са становишта детаља имплементације где су представљени пакети реализовани на основу предложене методологије, као и са становишта коришћења где су описане карактеристичне ситуације у којима се симулатор може користити. На основу имплементације симулатора и пратећих библиотека развијене су лабораторијске вежбе и пројекти из предмета конкурентно и дистрибуирано програмирање, које су представљене у наставку рада као и евалуација постигнутих резултата у настави. Поред ове евалуације на крају рада је представљена и евалуација симулатора са становишта експерименталних резултата и са становишта аналитичког модела као би се утврдило у којим случајевима и у ком обиму се могу користити симулатори развијени сходно описаној методологији..

Equivariant Symmetries for Inertial Navigation Systems

This paper investigates the problem of inertial navigation system (INS) filter design through the lens of symmetry. The extended Kalman filter (EKF) and its variants, have been the staple of INS filtering for 50 years; however, recent advances in inertial navigation systems have exploited matrix Lie group structure to design stochastic filters and state observers that have been shown to display superior performance compared to classical solutions. In this work we consider the case where a vehicle has an inertial measurement unit (IMU) and a global navigation satellite system (GNSS) receiver. We show that all the modern variants of the EKF for these sensors can be interpreted as the recently proposed Equivariant Filter (EqF) design methodology applied to different choices of symmetry group for the INS problem. This leads us to propose two new symmetries for the INS problem that have not been considered in the prior literature, and provide a discussion of the relative strengths and weaknesses of all the different algorithms. We believe the collection of symmetries that we present here capture all the sensible choices of symmetry for this problem and sensor suite, and that the analysis provided is indicative of the relative real-world performance potential of the different algorithms.Comment: Submitted to Automatic