144 research outputs found

    Optical Time-Frequency Packing: Principles, Design, Implementation, and Experimental Demonstration

    Full text link
    Time-frequency packing (TFP) transmission provides the highest achievable spectral efficiency with a constrained symbol alphabet and detector complexity. In this work, the application of the TFP technique to fiber-optic systems is investigated and experimentally demonstrated. The main theoretical aspects, design guidelines, and implementation issues are discussed, focusing on those aspects which are peculiar to TFP systems. In particular, adaptive compensation of propagation impairments, matched filtering, and maximum a posteriori probability detection are obtained by a combination of a butterfly equalizer and four 8-state parallel Bahl-Cocke-Jelinek-Raviv (BCJR) detectors. A novel algorithm that ensures adaptive equalization, channel estimation, and a proper distribution of tasks between the equalizer and BCJR detectors is proposed. A set of irregular low-density parity-check codes with different rates is designed to operate at low error rates and approach the spectral efficiency limit achievable by TFP at different signal-to-noise ratios. An experimental demonstration of the designed system is finally provided with five dual-polarization QPSK-modulated optical carriers, densely packed in a 100 GHz bandwidth, employing a recirculating loop to test the performance of the system at different transmission distances.Comment: This paper has been accepted for publication in the IEEE/OSA Journal of Lightwave Technolog

    Wavelet-based multi-carrier code division multiple access systems

    Get PDF
    EThOS - Electronic Theses Online ServiceGBUnited Kingdo

    Energy-efficient wideband transceiver with per-band equalisation and synchronisation

    Get PDF
    To emit in the TV white space (TVWS) spectrum, the regulator has requested very strict spectral masks, which can be fulfilled using a FFT-modulated filter-bank multi-carrier system (FBMC) to extract one or several TVWS channels in the 470--790MHz range. Such a system reduces the channel dispersion, but even with near-perfectly reconstructing filter bank, the need for equalisation and synchronisation remains. In this work, we propose a per-band equalisation and synchronisation approach, performed by a constant modulus algorithms running concurrently with a direction-directed adaptation process for faster convergence and reduced phase ambiguity. We compare symbol- and fractionally-spaced versions, and investigate their fixed-point implementation on an FPGA. We compare the performance of the different systems in terms of mean squared error, computational cost, and robustness towards noise

    Performance analysis of FBMC over OFDM in Cognitive Radio Network

    Get PDF
    Cognitive Radio (CR) system is an adaptive, reconfigurable communication system that can intuitively adjust its parameters to meet users or network demands. The major objective of CR is to provide a platform for the Secondary User (SU) to fully utilize the available spectrum resource by sensing the existence of spectrum holes without causing interference to the Primary User (PU). However, PU detection has been one of the main challenges in CR technology. In comparison to traditional wireless communication systems, due to the Cross-Channel Interference (CCI) from the adjacent channels used by SU to PU, CR system now poses new challenges to Resource Allocation (RA) problems. Past efforts have been focussed on Orthogonal Frequency Division Multiplexing (OFDM) based CR systems. However, OFDM technique show various limitations in CR application due to its enormous spectrum leakage. Filter Bank based Multicarrier (FBMC) has been proposed as a promising Multicarrier Modulation (MCM) candidate that has numerous advantages over OFDM. In this dissertation, a critical analysis of the performance of FBMC over OFDM was studied, and CR system was used as the testing platform. Firstly, the problem of spectrum sensing of OFDM based CR systems in contrast to FBMC based were surveyed from literature point of view, then the performance of the two schemes was analysed and compared from the spectral efficiency point of view. A resource allocation algorithm was proposed where much attention was focused on interference and power constraint. The proposed algorithms have been verified using MATLAB simulations, however, numerical results show that FBMC can attain higher spectrum efficiency and attractive benefit in terms of spectrum sensing as opposed to OFDM. The contributions of this dissertation have heightened the interest in more research and findings on how FBMC can be improved for future application CR systems

    Experimental Demonstration of Spectrally Efficient Frequency Division Multiplexing Transmissions at E-Band

    Get PDF
    This paper presents the design and the experimental demonstration of transmission of spectrally efficient frequency division multiplexing (SEFDM) signals, using a single 5-GHz channel, from 81 to 86 CHz in the E-hand frequency allocation. A purpose-built E-band SEFDM experimental demonstrator, consisting of transmitter and receiver GaAs microwave integrated circuits, along with a complete chain of digital signal processing is explained. Solutions are proposed to solve the channel and phase offset estimation and equalization issues, which arise from the well-known intercarrier interference between the SEFDM signal subcarriers. This paper shows the highest transmission rate of 12 Gb/s over a bandwidth varying between 2.67 to 4 CHz depending on the compression level of the SEFDM signals, which results in a spectral efficiency improvement by up to 50%, compared to the conventional orthogonal frequency division multiplexing modulation format

    Research on Cognitive Radio within the Freeband-AAF project

    Get PDF

    Multicarrier Faster-than-Nyquist Signaling Transceivers: From Theory to Practice

    Get PDF
    The demand for spectrum resources in cellular systems worldwide has seen a tremendous escalation in the recent past. The mobile phones of today are capable of being cameras taking pictures and videos, able to browse the Internet, do video calling and much more than an yesteryear computer. Due to the variety and the amount of information that is being transmitted the demand for spectrum resources is continuously increasing. Efficient use of bandwidth resources has hence become a key parameter in the design and realization of wireless communication systems. Faster-than-Nyquist (FTN) signaling is one such technique that achieves bandwidth efficiency by making better use of the available spectrum resources at the expense of higher processing complexity in the transceiver. This thesis addresses the challenges and design trade offs arising during the hardware realization of Faster-than-Nyquist signaling transceivers. The FTN system has been evaluated for its achievable performance compared to the processing overhead in the transmitter and the receiver. Coexistence with OFDM systems, a more popular multicarrier scheme in existing and upcoming wireless standards, has been considered by designing FTN specific processing blocks as add-ons to the conventional transceiver chain. A multicarrier system capable of operating under both orthogonal and FTN signaling has been developed. The performance of the receiver was evaluated for AWGN and fading channels. The FTN system was able to achieve 2x improvement in bandwidth usage with similar performance as that of an OFDM system. The extra processing in the receiver was in terms of an iterative decoder for the decoding of FTN modulated signals. An efficient hardware architecture for the iterative decoder reusing the FTN specific processing blocks and realize different functionality has been designed. An ASIC implementation of this decoder was implemented in a 65nm CMOS technology and the implemented chip has been successfully verified for its functionality

    Novel Multicarrier Memory Channel Architecture Using Microwave Interconnects: Alleviating the Memory Wall

    Get PDF
    abstract: The increase in computing power has simultaneously increased the demand for input/output (I/O) bandwidth. Unfortunately, the speed of I/O and memory interconnects have not kept pace. Thus, processor-based systems are I/O and interconnect limited. The memory aggregated bandwidth is not scaling fast enough to keep up with increasing bandwidth demands. The term "memory wall" has been coined to describe this phenomenon. A new memory bus concept that has the potential to push double data rate (DDR) memory speed to 30 Gbit/s is presented. We propose to map the conventional DDR bus to a microwave link using a multicarrier frequency division multiplexing scheme. The memory bus is formed using a microwave signal carried within a waveguide. We call this approach multicarrier memory channel architecture (MCMCA). In MCMCA, each memory signal is modulated onto an RF carrier using 64-QAM format or higher. The carriers are then routed using substrate integrated waveguide (SIW) interconnects. At the receiver, the memory signals are demodulated and then delivered to SDRAM devices. We pioneered the usage of SIW as memory channel interconnects and demonstrated that it alleviates the memory bandwidth bottleneck. We demonstrated SIW performance superiority over conventional transmission line in immunity to cross-talk and electromagnetic interference. We developed a methodology based on design of experiment (DOE) and response surface method techniques that optimizes the design of SIW interconnects and minimizes its performance fluctuations under material and manufacturing variations. Along with using SIW, we implemented a multicarrier architecture which enabled the aggregated DDR bandwidth to reach 30 Gbit/s. We developed an end-to-end system model in Simulink and demonstrated the MCMCA performance for ultra-high throughput memory channel. Experimental characterization of the new channel shows that by using judicious frequency division multiplexing, as few as one SIW interconnect is sufficient to transmit the 64 DDR bits. Overall aggregated bus data rate achieves 240 GBytes/s data transfer with EVM not exceeding 2.26% and phase error of 1.07 degree or less.Dissertation/ThesisDoctoral Dissertation Electrical Engineering 201
    • …
    corecore