Preventing Wide Area Blackouts in Transmission Systems: A New Approach for Intentional Controlled Islanding using Power Flow Tracing

A novel method to reduce the impact of wide area blackouts in transmission networks is presented. Millions of customers are affected each year due to blackouts. Splitting a transmission system into smaller islands could significantly reduce the effect of these blackouts. Large blackouts are typically a result of cascading faults which propagate throughout a network where Intentional Controlled Islanding (ICI) has the advantage of containing faults to smaller regions and stop them cascading further. Existing methodologies for ICI are typically calculated offline and will form pre-determined islands which can often lead to excessive splits. This thesis developed an ICI approach based on real time information which will calculate an islanding solution quickly in order to provide a ‘just-in-time’ strategy. The advantage of this method is that the island solution is designed based on the current operating point, but well also be designed for the particular disturbance location and hence will avoid unnecessary islanding. The new method will use a power flow tracing technique to find a boundary around a disturbance which forms the island that will be cut. The tracing method required only power flow information and so, can be computed quite quickly. The action of islanding itself can be a significant disturbance, therefore any islanding solution should aim to add as little stress as possible to the system. While methods which minimise the power imbalance and total power disrupted due to splitting are well documented, there has been little study into the effect islanding would have on voltage. There a new approach to consider the effects that islanding will have on the voltage stability of the system is developed. The ICI method is based on forming an island specific to a disturbance. If the location of a source is known along with information that a blackout is imminent, the methodology will find the best island in which to contain that disturbance. This is a slightly different approach to existing methods which will form islands independent of disturbance location knowledge. An area of influence is found around a node using power flow tracing, which consists of the strongly connected elements to the disturbance. Therefore, low power flows can be disconnected. This area of influence forms the island that will be disconnected, leaving the rest of the system intact. Hence minimising the number of islands formed. Finally the methodology is compared to the existing methods to show that the new tool developed in this thesis can find better solutions and that a new way of thinking about power system ICI can be put forward

Analysis of consensus-based islanded microgrids subject to unexpected electrical and communication partitions

© 2018 IEEE. Personal use of this material is permitted. Permission from IEEE must be obtained for all other uses, in any current or future media, including reprinting /republishing this material for advertising or promotional purposes, creating new collective works, for resale or redistribution to servers or lists, or reuse of any copyrighted component of this work in other worksMicrogrids are power systems consisting of an electrical network composed by distributed loads and generation units that may include a communication network for improved operation. The considered microgrid in islanded mode is driven by voltage source inverters implementing decentralized droop control for active power sharing together with a communication-based consensus algorithm for frequency regulation. This paper analyses the microgrid performance subject to network failures that provoke network partitions. It is considered that the electrical partition leads to several sub-microgrids working in parallel where the power demand can be always guaranteed by the generation units, and the communication partition leads to several consensus algorithms also working in parallel. The double partitioning is analyzed through a closed-loop system model derived using the power flow equations that includes the electrical and communication connectivity. Analytical expressions for the steady-state values for both frequency and active power depending on the partitioning are derived. Selected experimental results on a low-scale laboratory microgrid illustrate the (undesirable) impact that unexpected partitions have in system performancePeer ReviewedPostprint (author's final draft

Coordinated voltage regulation of hybrid AC/DC medium voltage distribution networks

Abstract In a hybrid AC/DC medium voltage distribution network, distributed generations (DGs), energy storage systems (ESSs), and the voltage source converters (VSCs) between AC and DC lines, have the ability to regulate node voltages in real-time. However, the voltage regulation abilities of above devices are limited by their ratings. And the voltage regulation efficiencies of these devices are also different. Besides, due to high r/x ratio, node voltages are influenced by both real and reactive power. In order to achieve the coordinated voltage regulation in a hybrid AC/DC distribution network, a priority-based real-time control strategy is proposed based on the voltage control effect of real and reactive power adjustment. The equivalence of real and reactive power adjustment on voltage control is considered in control area partition optimization, in which regulation efficiency and capability are taken as objectives. In order to accommodate more DGs, the coordination of controllable devices is achieved according to voltage sensitivities. Simulations studies are performed to verify the proposed method

Analysis of new control applications

This document reports the results of the activities performed during the first year of the CRUTIAL project, within the Work Package 1 "Identification and description of Control System Scenarios". It represents the outcome of the analysis of new control applications in the Power System and the identification of critical control system scenarios to be explored by the CRUTIAL project

Optimization Techniques for the Developing Distribution System

The most rapidly changing part of today’s power grid is the distribution system. Many new technologies have emerged that revolutionize the way utilities provide, and now sometimes receive, power to and from their customers. To an extent, the push for de-regulation of utilities has also led to an increased focus on reliability and efficiency. These changes make design and operation of power systems more complex causing utilities to question if they are operating optimally. Operations Research (OR) is an area of mathematics where quantitative analysis is used to provide a basis for complex decision making. The changing landscape in electric distribution makes it a prime candidate for the application of OR techniques. This research seeks to develop optimization methods that can be applied to any distribution feeder or group of feeders that allows for optimal decisions to be made in a reasonable time frame. Two specific applications identified in this thesis are optimal reconfiguration during outage situations and optimal location of Battery Energy Storage Systems (BESS). Response to outages has traditionally relied on human-in-the-loop approaches where a dispatcher or a crew working the field decides what switching operations are needed to isolate affected parts of the system and restore power to healthy ones. This approach is time consuming and under-utilizes the benefits provided by widely-adopted, remotely-controlled switching technologies. Chapters Two and Three of this thesis develop a partitioning method for determining the switching operations required to optimize the amount of load that is restored during an event. Most people would agree that renewable forms of Distributed Generation (DG) provide great benefits to the power industry, especially through reduced impact on the environment. The variable nature of renewables, however, can cause many issues for operation and control of a utilities’ system, especially for distribution interconnections. Storage technologies are thought to be the primary solution to these issues with much research focused on sizing and control of BESSs. Equally important for integration, but often overlooked, is the location at which the device is connected. Chapter Four explores this idea by drawing conclusions about optimal BESS location based on well-studied ideas of optimal capacitor location

Intentional Controlled Islanding in Wide Area Power Systems with Large Scale Renewable Power Generation to Prevent Blackout

Intentional controlled islanding is a solution to prevent blackouts following a large disturbance. This study focuses on determining island boundaries while maintaining the stability of formed islands and minimising load shedding. A new generator coherency identification framework based on the dynamic coupling of generators and Support Vector Clustering method is proposed to address this challenge. A Mixed Integer Linear Programming model is formulated to minimize power flow disruption and load shedding, and ensure the stability of islanding. The proposed algorithm was validated in 39-bus and 118-bus test systems

On Co-Optimization Of Constrained Satisfiability Problems For Hardware Software Applications

Manufacturing technology has permitted an exponential growth in transistor count and density. However, making efficient use of the available transistors in the design has become exceedingly difficult. Standard design flow involves synthesis, verification, placement and routing followed by final tape out of the design. Due to the presence of various undesirable effects like capacitive crosstalk, supply noise, high temperatures, etc., verification/validation of the design has become a challenging problem. Therefore, having a good design convergence may not be possible within the target time, due to a need for a large number of design iterations. Capacitive crosstalk is one of the major causes of design convergence problems in deep sub-micron era. With scaling, the number of crosstalk violations has been increasing because of reduced inter-wire distances. Consequently only the most severe crosstalk faults are fixed pre-silicon while the rest are tested post-silicon. Testing for capacitive crosstalk involves generation of input patterns which can be applied post-silicon to the integrated circuit and comparison of the output response. These patterns are generated at the gate/ Register Transfer Level (RTL) of abstraction using Automatic Test Pattern Generation (ATPG) tools. In this dissertation, anInteger Linear Programming (ILP) based ATPG technique for maximizing crosstalk induced delay increase at the victim net, for multiple aggressor crosstalk faults, is presented. Moreover, various solutions for pattern generation considering both zero as well as unit delay models is also proposed. With voltage scaling, power supply switching noise has become one of the leading causes of signal integrity related failures in deep sub-micron designs. Hence, during power supply network design and analysis of power supply switching noise, computation of peak supply current is an essential step. Traditional peak current estimation approaches involve addition of peak current associated with all the CMOS gates which are switching in a combinational circuit. Consequently, this approach does not take the Boolean and temporal relationships of the circuit into account. This work presents an ILP based technique for generation of an input pattern pair which maximizes switching supply currents for a combinational circuit in the presence of integer gate delays. The input pattern pair generated using the above approach can be applied post-silicon for power droop testing. With high level of integration, Multi-Processor Systems on Chip (MPSoC) feature multiple processor cores and accelerators on the same die, so as to exploit the instruction level parallelism in the application. For hardware-software co-design, application programming model is based on a Task Graph, which represents task dependencies and execution/transfer times for various threads and processes within an application. Mapping an application to an MPSoC traditionally involves representing it in the form of a task graph and employing static scheduling in order to minimize the schedule length. Dynamic system behavior is not taken into consideration during static scheduling, while dynamic scheduling requires the knowledge of task graph at runtime. A run-time task graph extraction heuristic to facilitate dynamic scheduling is also presented here. A novel game theory based approach uses this extracted task graph to perform run-time scheduling in order to minimize total schedule length. With increase in transistor density, power density has gone up substantially. This has lead to generation of regions with very high temperature called Hotspots. Hotspots lead to reliability and performance issues and affect design convergence. In current generation Integrated Circuits (ICs) temperature is controlled by reducing power dissipation using Dynamic Thermal Management (DTM) techniques like frequency and/or voltage scaling. These techniques are reactive in nature and have detrimental effects on performance. Here, a look-ahead based task migration technique is proposed, in order to utilize the multitude of cores available in an MPSoC to eliminate thermal emergencies. Our technique is based on temperature prediction, leveraging upon a novel wavelet based thermal modeling approach. Hence, this work addresses several optimization problems that can be reduced to constrained max-satisfiability, involving integer as well as Boolean constraints in hardware and software domains. Moreover, it provides domain specific heuristic solutions for each of them