Minimum Circuit Size, Graph Isomorphism, and Related Problems

We study the computational power of deciding whether a given truth-table can be described by a circuit of a given size (the Minimum Circuit Size Problem, or MCSP for short), and of the variant denoted MKTP where circuit size is replaced by a polynomially-related Kolmogorov measure. All prior reductions from supposedly-intractable problems to MCSP / MKTP hinged on the power of MCSP / MKTP to distinguish random distributions from distributions produced by hardness-based pseudorandom generator constructions. We develop a fundamentally different approach inspired by the well-known interactive proof system for the complement of Graph Isomorphism (GI). It yields a randomized reduction with zero-sided error from GI to MKTP. We generalize the result and show that GI can be replaced by any isomorphism problem for which the underlying group satisfies some elementary properties. Instantiations include Linear Code Equivalence, Permutation Group Conjugacy, and Matrix Subspace Conjugacy. Along the way we develop encodings of isomorphism classes that are efficiently decodable and achieve compression that is at or near the information-theoretic optimum; those encodings may be of independent interest

Speeding Up VLSI Layout Verification Using Fuzzy Attributed Graphs Approach

Technical and economic factors have caused the field of physical design automation to receive increasing attention and commercialization. The steady down-scaling of complementary metal oxide semiconductor (CMOS) device dimensions has been the main stimulus to the growth of microelectronics and computer-aided very large scale integration (VLSI) design. The more an Integrated Circuit (IC) is scaled, the higher its packing density becomes. For example, in 2006 Intel\u27s 65-nm process technology for high performance microprocessor has a reduced gate length of 35 nanometers. In their 70-Mbit SRAM chip, there are up to 0.5 billion transistors in a 110 mm2 chip size with 3.4 GHz clock speed. New technology generations come out every two years and provide an approximate 0.7 times transistor size reduction as predicted by Moore\u27s Law. For the ultimate scaled MOSFET beyond 2015 or so, the transistor gate length is projected to be 10 nm and below. The continually increasing size of chips, measured in either area or number of transistors, and the wasted investment involving fabricating and testing faulty circuits, make layout analysis an important part of physical design automation. Layout-versus-schematic (LVS) is one of three kinds of layout analysis tools. Subcircuit extraction is the key problem to be solved in LVS. In LVS, two factors are important. One is run time, the other is identification correctness. This has created a need for computational intelligence. Fuzzy attributed graph is not only widely used in the fields of image understanding and pattern recognition, it is also useful to the fuzzy graph matching problem. Since the subcircuit extraction problem is a special case of a general-interest problem known as subgraph isomorphism, fuzzy attributed graphs are first effectively applied to the subgraph isomorphism problem. Then we provide an efficient fuzzy attributed graph algorithm based on the solution to subgraph isomorphism for the subcircuit extractio- n problem. Similarity measurement makes a significant contribution to evaluate the equivalence of two circuit graphs. To evaluate its performance, we compare fuzzy attributed graph approach with the commercial software called SubGemini, and two of the fastest approaches called DECIDE and SubHDP. We are able to achieve up to 12 times faster performance than alternatives, without loss of accurac

A Universal Formula for Deformation Quantization on K\"ahler Manifolds

We give an explicit local formula for any formal deformation quantization, with separation of variables, on a K\"ahler manifold. The formula is given in terms of differential operators, parametrized by acyclic combinatorial graphs.Comment: 20 pages, 8 figure

Matroids with nine elements

We describe the computation of a catalogue containing all matroids with up to nine elements, and present some fundamental data arising from this cataogue. Our computation confirms and extends the results obtained in the 1960s by Blackburn, Crapo and Higgs. The matroids and associated data are stored in an online database, and we give three short examples of the use of this database.Comment: 22 page

The Complexity of Bisimulation and Simulation on Finite Systems

In this paper the computational complexity of the (bi)simulation problem over restricted graph classes is studied. For trees given as pointer structures or terms the (bi)simulation problem is complete for logarithmic space or NC$^1$, respectively. This solves an open problem from Balc\'azar, Gabarr\'o, and S\'antha. Furthermore, if only one of the input graphs is required to be a tree, the bisimulation (simulation) problem is contained in AC$^1$ (LogCFL). In contrast, it is also shown that the simulation problem is P-complete already for graphs of bounded path-width