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A design representation model for high-level synthesis
Design tools share and exchange various types of information pertaining to the design. The identification of a uniform design representation to capture this information is essential for the development of a successful design environment. We have done an extensive study on the representation needs of existing database tools in the UCI CADLAB; examples of which are graph compilers for high-level hardware specifications, state schedulers, hardware allocators, and microarchitecture optimizers. The result of this study is the development of a design representation model that will serve as a common internal representation (DDM) for all system and behavioral synthesis tools. DDM thus builds the foundation for a CAD Framework in which design tools can communicate via operating on this common representation. The design information is composed of three separate graph models: the conceptual model, the behavioral model and the structural model. The conceptual model (represented by a Design Entity Graph) captures the overall organization of the design information, such as, versions and configurations. The behavioral model (represented by an Augmented Control/Data Flow Graph) describes the design behavior. The structural model (represented by an Annotated Component Graph) captures the hierarchical data path structure and its geometric information. In this paper, we define the last two graph models. They both capture the actual design data of the application domain. Since VHDL has gained increasing popularity as hardware description language for synthesis, we give numerous examples throughout this report that show how the proposed design representation model can be used to represent VHDL specifications
Trace Spaces: an Efficient New Technique for State-Space Reduction
State-space reduction techniques, used primarily in model-checkers, all rely
on the idea that some actions are independent, hence could be taken in any
(respective) order while put in parallel, without changing the semantics. It is
thus not necessary to consider all execution paths in the interleaving
semantics of a concurrent program, but rather some equivalence classes. The
purpose of this paper is to describe a new algorithm to compute such
equivalence classes, and a representative per class, which is based on ideas
originating in algebraic topology. We introduce a geometric semantics of
concurrent languages, where programs are interpreted as directed topological
spaces, and study its properties in order to devise an algorithm for computing
dihomotopy classes of execution paths. In particular, our algorithm is able to
compute a control-flow graph for concurrent programs, possibly containing
loops, which is "as reduced as possible" in the sense that it generates traces
modulo equivalence. A preliminary implementation was achieved, showing
promising results towards efficient methods to analyze concurrent programs,
with very promising results compared to partial-order reduction techniques
Formal Relationships Between Geometrical and Classical Models for Concurrency
A wide variety of models for concurrent programs has been proposed during the
past decades, each one focusing on various aspects of computations: trace
equivalence, causality between events, conflicts and schedules due to resource
accesses, etc. More recently, models with a geometrical flavor have been
introduced, based on the notion of cubical set. These models are very rich and
expressive since they can represent commutation between any bunch of events,
thus generalizing the principle of true concurrency. While they seem to be very
promising - because they make possible the use of techniques from algebraic
topology in order to study concurrent computations - they have not yet been
precisely related to the previous models, and the purpose of this paper is to
fill this gap. In particular, we describe an adjunction between Petri nets and
cubical sets which extends the previously known adjunction between Petri nets
and asynchronous transition systems by Nielsen and Winskel
Homotopy Bisimilarity for Higher-Dimensional Automata
We introduce a new category of higher-dimensional automata in which the
morphisms are functional homotopy simulations, i.e. functional simulations up
to concurrency of independent events. For this, we use unfoldings of
higher-dimensional automata into higher-dimensional trees. Using a notion of
open maps in this category, we define homotopy bisimilarity. We show that
homotopy bisimilarity is equivalent to a straight-forward generalization of
standard bisimilarity to higher dimensions, and that it is finer than split
bisimilarity and incomparable with history-preserving bisimilarity.Comment: Heavily revised version of arXiv:1209.492
The multidegree of the multi-image variety
The multi-image variety is a subvariety of Gr(1,P^3)^n that models taking
pictures with n rational cameras. We compute its cohomology class in the
cohomology of Gr(1,P^3)^n, and from there its multidegree as a subvariety of
(P^5)^n under the Pl\"ucker embedding.Comment: 16 pages, 5 figures, 1 tabl
Virtual manufacturing: prediction of work piece geometric quality by considering machine and set-up
Lien vers la version éditeur: http://www.tandfonline.com/doi/full/10.1080/0951192X.2011.569952#.U4yZIHeqP3UIn the context of concurrent engineering, the design of the parts, the production planning and the manufacturing facility must be considered simultaneously. The design and development cycle can thus be reduced as manufacturing constraints are taken into account as early as possible. Thus, the design phase takes into account the manufacturing constraints as the customer requirements; more these constraints must not restrict the creativity of design. Also to facilitate the choice of the most suitable system for a specific process, Virtual Manufacturing is supplemented with developments of numerical computations (Altintas et al. 2005, Bianchi et al. 1996) in order to compare at low cost several solutions developed with several hypothesis without manufacturing of prototypes. In this context, the authors want to predict the work piece geometric more accurately by considering machine defects and work piece set-up, through the use of process simulation. A particular case study based on a 3 axis milling machine will be used here to illustrate the authors’ point of view. This study focuses on the following geometric defects: machine geometric errors, work piece positioning errors due to fixture system and part accuracy
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